Abstract: A thin film transistor (TFT) substrate is provided in which a sufficiently large contact area between conductive materials is provided in a contact portion and a method of fabricating the TFT substrate. The TFT substrate includes a gate interconnection line formed on an insulating substrate, a gate insulating layer covering the gate interconnection line, a semiconductor layer arranged on the gate insulating layer, a data interconnection line including a data line, a source electrode and a drain electrode formed on the semiconductor layer, a first passivation layer formed on the data interconnection line and exposing the drain electrode, a second passivation layer formed on the first passivation film and a pixel electrode electrically connected to the drain electrode. An outer sidewall of the second passivation layer is positioned inside an outer sidewall of the first passivation layer.

Abstract: A method of fabricating a thin film transistor array substrate is presented. The method entails forming a gate interconnection line on an insulating substrate, forming a gate insulating layer on the gate interconnection line, forming a semiconductor layer and a data interconnection line on the semiconductor layer, sequentially forming multiple passivation layers, etching the passivation layers down to a drain electrode that is an extension of the data interconnection line. The portion of the drain electrode that is exposed at this stage is a part of the drain electrode-pixel electrode contact portion. A pixel electrode is formed connected to the drain electrode. Two of the passivation layers have the same composition but are processed at different temperatures. A thin film transistor prepared in the above manner is also presented.

Abstract: A display substrate includes a first light blocking pattern formed on a base substrate, a first switching element, a second light blocking pattern formed on the base substrate, and a first sensing element. The first light blocking pattern is configured to block visible light and transmit infrared light. The first switching element includes a first semiconductor pattern, a first source electrode, a first drain electrode, and a first gate electrode. The second light blocking pattern is configured to block the visible light and transmit the infrared light. The first sensing element is configured to detect the infrared light, and includes a second semiconductor pattern, a second source electrode, a second drain electrode, and a second gate electrode.

Abstract: A touch screen substrate includes a base substrate, a first switching element and a first sensing element which senses infrared light. The first switching element includes a first switching gate electrode, a first active pattern disposed on the first switching gate electrode, a first switching source electrode disposed on the first active pattern and a first switching drain electrode disposed apart from the first switching source electrode. The first sensing element includes a first sensing drain electrode connected to the first switching source electrode, a first sensing source electrode disposed apart from the first sensing drain electrode, a second active pattern disposed below the first sensing drain electrode and the first sensing source electrode and including a first amorphous layer, a doped amorphous layer and a second amorphous layer, and a first sensing gate electrode disposed on the first sensing drain electrode and the first sensing source electrode.

Abstract: An anisotropic conductive film includes a first thin film layer including concave portions, conductive balls arranged in the concave portions, insulating balls disposed on and between the conductive balls and each having a diameter smaller than the conductive balls, and a second thin film layer disposed covering the insulating balls. A display apparatus includes a pad part and a driving chip, which are electrically connected by the anisotropic conductive film.

Abstract: A sensor array substrate, a display device including the sensor array substrate, and a method of manufacturing the sensor array substrate are provided. The sensor array substrate includes a substrate, a first sensor formed on a first pixel area of the substrate and configured to detect light, an overcoat layer formed on the first sensor, and a shield layer formed over the overcoat layer, wherein the shield layer overlaps the first sensor.

Abstract: A display device includes a lower panel including a lower substrate and a pixel transistor formed on the lower substrate; and an upper panel facing the lower panel, and including an upper substrate, a sensing transistor formed on the upper substrate, and a readout transistor connected to the sensing transistor and transmitting a signal. The readout transistor includes a first lower gate electrode formed on the upper substrate, a first semiconductor layer formed on the first lower gate electrode and overlaps the first gate electrode, and a first source electrode and a first drain electrode disposed on the first semiconductor layer.

Abstract: In manufacturing a thin film transistor array substrate, a passivation film is formed over the transistors. A first photoresist pattern is formed over the passivation film, with a first portion partially overlying at least one source/drain electrode of each transistor and overlying each pixel electrode region, and with a second portion thicker than the first portion. The passivation film is patterned using the first photoresist pattern as a mask. The first photoresist pattern's first portion is removed to form a second photoresist pattern which protrudes upward around the pixel electrode regions. A transparent conductive film is formed with recesses in the pixel electrode regions. A masking pattern is formed over the transparent film in each pixel electrode region, the masking pattern's top surface being below a top of the transparent film. The transparent film is patterned using the masking pattern as a mask to form the pixel electrodes.

Abstract: In a visible-light blocking member, an infrared sensor including the visible-light blocking member, and a liquid crystal display including the infrared sensor, a visible-light blocking member is a structure including amorphous germanium or a compound of amorphous germanium and has higher transmittance for a wavelength of an infrared ray region than for a wavelength of a visible light region. Accordingly, sensitivity to infrared rays may be increased by applying the visible-light blocking member to the infrared sensor.

Abstract: A display panel that includes: a substrate, a sensing transistor disposed on the substrate, and a readout transistor connected to the sensing transistor and transmitting a detecting signal is presented. The sensing transistor includes a semiconductor layer disposed on the upper substrate, a source electrode and a drain electrode disposed on the semiconductor layer, and a gate electrode overlapping the semiconductor layer on the source electrode and the drain electrode. Accordingly, in a display device and a manufacturing method thereof, an infrared sensing transistor, a visible light sensing transistor, and a readout transistor are simultaneously formed with a top gate structure such that the number of manufacturing processes and the manufacturing cost may be reduced.

Abstract: A thin-film transistor array panel and a manufacturing method thereof are provided for one or more embodiments. The thin-film transistor array panel may include: a substrate; a gate electrode formed on the substrate; a gate insulating layer formed on the gate electrode; a source electrode and a drain electrode formed on the gate insulating layer; and a flatness layer formed on the source electrode and the drain electrode, wherein the drain electrode has a higher height than the flatness layer.

Abstract: A method of fabricating a thin film transistor array substrate is presented. The method entails forming a gate interconnection line on an insulating substrate, forming a gate insulating layer on the gate interconnection line, forming a semiconductor layer and a data interconnection line on the semiconductor layer, sequentially forming multiple passivation layers, etching the passivation layers down to a drain electrode that is an extension of the data interconnection line. The portion of the drain electrode that is exposed at this stage is a part of the drain electrode-pixel electrode contact portion. A pixel electrode is formed connected to the drain electrode. Two of the passivation layers have the same composition but are processed at different temperatures. A thin film transistor prepared in the above manner is also presented.

Abstract: A thin film transistor (TFT) substrate is provided in which a sufficiently large contact area between conductive materials is provided in a contact portion and a method of fabricating the TFT substrate. The TFT substrate includes a gate interconnection line formed on an insulating substrate, a gate insulating layer covering the gate interconnection line, a semiconductor layer arranged on the gate insulating layer, a data interconnection line including a data line, a source electrode and a drain electrode formed on the semiconductor layer, a first passivation layer formed on the data interconnection line and exposing the drain electrode, a second passivation layer formed on the first passivation film and a pixel electrode electrically connected to the drain electrode. An outer sidewall of the second passivation layer is positioned inside an outer sidewall of the first passivation layer.

Abstract: A method of manufacturing a display substrate and a display substrate manufactured by the same that are capable of improving display quality are presented. The method includes forming a gate wiring, a data wiring, a thin film transistor connected to the gate wiring and the data wiring respectively, and a protective insulating layer covering the gate wiring, the data wiring and the thin film transistor; forming a first black matrix pattern on the protective insulating layer; forming a protective insulating layer pattern by etching a part of the protective insulating layer by using the first black matrix pattern as an etching mask; forming a second black matrix pattern exposing at least one pixel region by removing a part of the first black matrix pattern; forming a color filter on the pixel region; and forming a pixel electrode electrically connected to the thin film transistor on at least a part of the color filter.

Abstract: Methods and apparatus are described for improved yield and line width performance for liquid polymers and other materials. A method for minimizing precipitation of developing reactant by lowering a sudden change in pH includes: developing at least a portion of a polymer layer on a substrate with an initial charge of a developer fluid; then rinsing the polymer with an additional charge of the developer fluid so as to controllably minimize a subsequent sudden change in pH; and then rinsing the polymer with a charge of another fluid. A method for achieving a more uniform, quasi-equilibrium succession of states from the introduction of developer chemical to the wafer surface to its removal is also described. The method reduces process-induced defects and improves critical dimension (CD) control.