Patents by Inventor Jung-Tsun Chuang

Jung-Tsun Chuang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10719097
    Abstract: A voltage regulation circuit is suitable to provide an output voltage to a core circuit. The voltage regulation circuit includes a pad, a pull-low unit, a first controlling unit, a second controlling unit and a voltage regulation circuit. The pad receives and provides an input voltage. The pull-low unit generates a pull-low voltage according to the input voltage. The first controlling unit generates a first controlling signal according to the input voltage and the pull-low voltage. The second controlling unit generates a second controlling signal according to the input voltage and the first controlling signal. The voltage regulation unit regulates the input voltage according to the first controlling signal and the second controlling signal, so as to generate the output voltage.
    Type: Grant
    Filed: June 13, 2019
    Date of Patent: July 21, 2020
    Assignee: VANGUARD INTERNATIONAL SEMICONDUCTOR CORPORATION
    Inventors: Jung-Tsun Chuang, Shao-Chang Huang, Wen-Tsung Wang, Chieh-Yao Chuang, Chi-Hung Lo
  • Patent number: 10523002
    Abstract: An electrostatic discharge (ESD) protection circuit is provided. A detector is coupled between a first input-output pad and a second input-output pad and detects the voltage levels of the first and second input-output pads to generate a detection signal. A inverter generates a control signal according to the detection signal. A control element is coupled between the first input-output pad and a first node. A current release element is coupled between the first node and the second input-output pad. When the detection signal is at a specific level, the control element and the current release element provide a discharge path to release an ESD current from the first input-output pad to the second input-output pad. When the detection signal is not at the specific level, the control element and the current release element do not provide a discharge path.
    Type: Grant
    Filed: December 5, 2016
    Date of Patent: December 31, 2019
    Assignee: VANGUARD INTERNATIONAL SEMICONDUCTOR CORPORATION
    Inventors: Shao-Chang Huang, Jung-Tsun Chuang, Chieh-Yao Chuang, Hung-Wei Chen
  • Publication number: 20190181135
    Abstract: A control circuit providing an output voltage and including an N-type transistor, a first P-type transistor and a second P-type transistor is provided. The N-type transistor is coupled to a first power terminal. The first P-type transistor includes a first source, a first drain, a first gate and a first bulk. The first gate is coupled to a gate of the N-type transistor. The first bulk is coupled to the first source. The second P-type transistor includes a second source, a second drain, a second gate and a second bulk. The second source is coupled to a second power terminal. The second drain and the second bulk are coupled to the first bulk.
    Type: Application
    Filed: December 12, 2017
    Publication date: June 13, 2019
    Applicant: Vanguard International Semiconductor Corporation
    Inventors: Shao-Chang HUANG, Shang-Chuan PAI, Wei-Chung WU, Szu-Chi CHEN, Sheng-Chih CHUANG, Yin-Ting LIN, Pei-Chun YU, Han-Pei LIU, Jung-Tsun CHUANG, Chieh-Yao CHUANG, Hung-Wei CHEN
  • Patent number: 10262706
    Abstract: An anti-floating circuit including a first pull-high circuit, a first pull-low circuit and a first control circuit is provided. The first pull-high circuit includes a first P-type transistor and a second P-type transistor and is coupled to a first power terminal. The first pull-low circuit includes a first N-type transistor and a second N-type transistor and is coupled to a second power terminal. A first path is between the first P-type transistor and the first N-type transistor. A second path is between the second P-type transistor and the second N-type transistor. A third path is between the first P-type transistor and the second power terminal. In the first mode, the control circuit turns on the first and second paths and turns off the third path. In the second mode, the control circuit turns off the first and second paths and turns on the third path.
    Type: Grant
    Filed: May 25, 2018
    Date of Patent: April 16, 2019
    Assignee: VANGUARD INTERNATIONAL SEMICONDUCTOR CORPORATION
    Inventors: Jung-Tsun Chuang, Shao-Chang Huang, Ching-Wen Chen, Chieh-Yao Chuang, Yu-Yen Lin
  • Patent number: 10164627
    Abstract: A power-on control circuit controlling a first output switch and a second output switch is provided. A detecting circuit detects a first voltage to generate a detection signal to a first node. A switching circuit receives the first voltage and a second voltage and transmits the first or second voltage to a second node according to the voltage level of the first node. A setting circuit generates a feedback signal to the first node according to a voltage level of the second node. When the first voltage reaches a first pre-determined value and the second voltage has not reached a second pre-determined value, the switching circuit transmits the second voltage to the second node. When the second voltage reaches the second pre-determined value, the switching circuit transmits the first voltage to the second node.
    Type: Grant
    Filed: August 31, 2017
    Date of Patent: December 25, 2018
    Assignee: VANGUARD INTERNATIONAL SEMICONDUCTOR CORPORATION
    Inventors: Jung-Tsun Chuang, Shao-Chang Huang, Chieh-Yao Chuang, Hung-Wei Chen
  • Patent number: 10101760
    Abstract: A power-on control circuit is provided. The power-on control circuit includes first and second power terminals, a switch circuit, an inverter chain circuit, and a capacitor. The switch circuit has a control terminal receiving a first control signal, an input terminal coupled to the second power terminal, and an output terminal coupled to a first node. The inverter chain circuit has an input terminal coupled to the first node and generates the first control signal. The capacitor is coupled between the first node and a ground. When the first power terminal receives a first voltage and the second power terminal does not receive a second voltage, the switch circuit is turned on according to the first control signal. When the first power terminal receives the first voltage and the second power terminal receives the second voltage, the switch circuit is turned off according to the first control signal.
    Type: Grant
    Filed: March 28, 2017
    Date of Patent: October 16, 2018
    Assignee: Vanguard International Semiconductor Corporation
    Inventors: Shao-Chang Huang, Jung-Tsun Chuang, Chieh-Yao Chuang, Hung-Wei Chen
  • Publication number: 20180284825
    Abstract: A power-on control circuit is provided. The power-on control circuit includes first and second power terminals, a switch circuit, an inverter chain circuit, and a capacitor. The switch circuit has a control terminal receiving a first control signal, an input terminal coupled to the second power terminal, and an output terminal coupled to a first node. The inverter chain circuit has an input terminal coupled to the first node and generates the first control signal. The capacitor is coupled between the first node and a ground. When the first power terminal receives a first voltage and the second power terminal does not receive a second voltage, the switch circuit is turned on according to the first control signal. When the first power terminal receives the first voltage and the second power terminal receives the second voltage, the switch circuit is turned off according to the first control signal.
    Type: Application
    Filed: March 28, 2017
    Publication date: October 4, 2018
    Applicant: Vanguard International Semiconductor Corporation
    Inventors: Shao-Chang HUANG, Jung-Tsun CHUANG, Chieh-Yao CHUANG, Hung-Wei CHEN
  • Patent number: 10056897
    Abstract: A power-on control circuit is provided. A first detection circuit detects the voltage of a first voltage source to generate a first detection signal to a first node. A switching circuit is coupled to the first voltage source and a second voltage source and outputs the voltage of the first voltage source or the voltage of the second voltage source to a second node according to the voltage level of the first node. A first buffer generates a feedback signal and a control signal according to the voltage level of the second node. A second detection circuit generates a second detection signal according to the feedback signal, the control signal, the voltage of the second voltage source and a recovery signal. A second buffer generates the recovery signal according to the second detection signal.
    Type: Grant
    Filed: October 23, 2017
    Date of Patent: August 21, 2018
    Assignee: VANGUARD INTERNATIONAL SEMICONDUCTOR CORPORATION
    Inventors: Jung-Tsun Chuang, Shao-Chang Huang, Chieh-Yao Chuang, Hung-Wei Chen
  • Publication number: 20180159323
    Abstract: An electrostatic discharge (ESD) protection circuit is provided. A detector is coupled between a first input-output pad and a second input-output pad and detects the voltage levels of the first and second input-output pads to generate a detection signal. A inverter generates a control signal according to the detection signal. A control element is coupled between the first input-output pad and a first node. A current release element is coupled between the first node and the second input-output pad. When the detection signal is at a specific level, the control element and the current release element provide a discharge path to release an ESD current from the first input-output pad to the second input-output pad. When the detection signal is not at the specific level, the control element and the current release element do not provide a discharge path.
    Type: Application
    Filed: December 5, 2016
    Publication date: June 7, 2018
    Applicant: Vanguard International Semiconductor Corporation
    Inventors: Shao-Chang HUANG, Jung-Tsun CHUANG, Chieh-Yao CHUANG, Hung-Wei CHEN
  • Patent number: 8779739
    Abstract: A DC converter is provided for converting a first supply voltage into a second supply voltage. The first supply voltage is higher than the second supply voltage. The DC converter includes a driving stage and an output stage. The driving stage includes a modulation circuit, a pull-up driving unit, a pull-up unit, a pull-down driving unit, and a pull-down unit. The modulation circuit generates a control signal according to the second supply voltage. The pull-up driving unit generates a first P-type driving signal and a second P-type driving signal to the pull-up unit according to the control signal. The pull-down driving unit generates a first N-type driving signal and a second N-type driving signal to the pull-down unit according to the control signal.
    Type: Grant
    Filed: February 5, 2013
    Date of Patent: July 15, 2014
    Assignees: Global Unichip Corporation, Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chao-Yen Huang, Jung-Tsun Chuang
  • Patent number: 8669803
    Abstract: A high speed level shifter is provided for converting a low input voltage into a wide-range high output voltage. By utilizing two switching units to improve the latching speed of the latching unit of the level shifter, the duty cycle of the input signal is nearly equal to the duty cycle of the output signal.
    Type: Grant
    Filed: February 21, 2013
    Date of Patent: March 11, 2014
    Assignees: Global Unichip Corporation, Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chao-Yen Huang, Jung-Tsun Chuang