Patents by Inventor Jung-Wei Chen
Jung-Wei Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240119213Abstract: A method includes designing a plurality of cells for a semiconductor device, wherein designing the plurality of cells comprises reserving a routing track of a plurality of routing tracks within each of the plurality of cells, wherein each of the plurality of cells comprises signal lines, and the reserved routing track is free of the signal lines. The method includes placing a first cell and a second cell of the plurality of cells in a layout of the semiconductor device. The method includes determining whether any power rails overlap with any of the plurality of routing tracks other than the reserved routing track in the second cell. The method includes adjusting a distance between the first cell and the second cell in response to a determination that at least one power rail overlaps with at least one routing track other than the reserved routing track.Type: ApplicationFiled: December 19, 2023Publication date: April 11, 2024Inventors: Jian-Sing LI, Jung-Chan YANG, Ting Yu CHEN, Ting-Wei CHIANG
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Patent number: 11462454Abstract: The present disclosure provides a semiconductor package. The semiconductor package includes a redistribution layer, a die, a heat spreader, a thermal interface material and a molding layer. The die is disposed on the redistribution layer. The heat spreader is disposed on the die. The thermal interface material is applied between the heat spreader and the die. The molding layer is formed on the redistribution layer to enclose the die. The present disclosure further provides a method of manufacturing the above semiconductor package.Type: GrantFiled: January 26, 2021Date of Patent: October 4, 2022Assignee: ORIENT SEMICONDUCTOR ELECTRONICS, LIMITEDInventors: Yueh-Ming Tung, Chia-Ming Yang, Jung-Wei Chen, Jian-De Leu, Guan-Lin Pan
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Patent number: 11462485Abstract: The present disclosure provides an electronic package. The electronic package includes a substrate, an electronic component, a plurality of conductive elements, a metal sheet and a molding layer. The electronic component is disposed on the substrate and electrically connected to the substrate. The conductive elements are disposed on the substrate and electrically connected with the grounding circuit on the substrate. The metal sheet is disposed above the electronic component and is in electrical contact with the conductive elements. The molding layer is formed between the substrate and the metal sheet to enclose the electronic component and the conductive elements. The present disclosure further provides a method of manufacturing the above electronic package.Type: GrantFiled: March 23, 2021Date of Patent: October 4, 2022Assignee: ORIENT SEMICONDUCTOR ELECTRONICS, LIMITEDInventors: Yueh-Ming Tung, Chia-Ming Yang, Jung-Wei Chen, Ying-Chuan Li, Ping-Hua Chu
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Publication number: 20220285217Abstract: The wafer thinning method of the present disclosure includes: providing a wafer having a front surface and a back surface opposite to the front surface; grinding the back surface of the wafer with a grinding bit to thin the wafer to a predetermined thickness; dicing the wafer with a dicing blade; ablating the wafer by performing a chemical solution or plasma process on the back surface of the wafer to thin the wafer; and separating the wafer into a plurality of dies.Type: ApplicationFiled: March 29, 2021Publication date: September 8, 2022Inventors: YUEH-MING TUNG, CHIA-MING YANG, GUAN-LIN PAN, JUNG-WEI CHEN, JIAN-DE LEU
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Publication number: 20220270981Abstract: The present disclosure provides an electronic package. The electronic package includes a substrate, an electronic component, a plurality of conductive elements, a metal sheet and a molding layer. The electronic component is disposed on the substrate and electrically connected to the substrate. The conductive elements are disposed on the substrate and electrically connected with the grounding circuit on the substrate. The metal sheet is disposed above the electronic component and is in electrical contact with the conductive elements. The molding layer is formed between the substrate and the metal sheet to enclose the electronic component and the conductive elements. The present disclosure further provides a method of manufacturing the above electronic package.Type: ApplicationFiled: March 23, 2021Publication date: August 25, 2022Inventors: YUEH-MING TUNG, CHIA-MING YANG, JUNG-WEI CHEN, YING-CHUAN LI, PING-HUA CHU
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Publication number: 20220199428Abstract: The method of manufacturing a semiconductor package of the present disclosure includes: providing a redistribution layer having opposing first surface and second surface; disposing a die on the first surface of the redistribution layer and electrically connecting the die to the redistribution layer; forming a mask on the second surface of the redistribution layer; performing a chemical or plasma etching process on the second surface of the redistribution layer to expose the conductive traces in the redistribution layer; removing the mask; and forming a plurality of conductive bumps on the second surface of the redistribution layer and electrically connecting the conductive bumps to the exposed conductive traces in the redistribution layer.Type: ApplicationFiled: February 2, 2021Publication date: June 23, 2022Inventors: YUEH-MING TUNG, CHIA-MING YANG, JUNG-WEI CHEN, JIAN-DE LEU, GUAN-LIN PAN
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Publication number: 20220189842Abstract: The present disclosure provides a semiconductor package. The semiconductor package includes a redistribution layer, a die, a heat spreader, a thermal interface material and a molding layer. The die is disposed on the redistribution layer. The heat spreader is disposed on the die. The thermal interface material is applied between the heat spreader and the die. The molding layer is formed on the redistribution layer to enclose the die. The present disclosure further provides a method of manufacturing the above semiconductor package.Type: ApplicationFiled: January 26, 2021Publication date: June 16, 2022Inventors: YUEH-MING TUNG, CHIA-MING YANG, JUNG-WEI CHEN, JIAN-DE LEU, GUAN-LIN PAN
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Patent number: 11355356Abstract: The method of manufacturing a semiconductor package of the present disclosure includes: providing a redistribution layer having opposing first surface and second surface; disposing a die on the first surface of the redistribution layer and electrically connecting the die to the redistribution layer; forming a mask on the second surface of the redistribution layer; performing a chemical or plasma etching process on the second surface of the redistribution layer to expose the conductive traces in the redistribution layer; removing the mask; and forming a plurality of conductive bumps on the second surface of the redistribution layer and electrically connecting the conductive bumps to the exposed conductive traces in the redistribution layer.Type: GrantFiled: February 2, 2021Date of Patent: June 7, 2022Assignee: ORIENT SEMICONDUCTOR ELECTRONICS, LIMITEDInventors: Yueh-Ming Tung, Chia-Ming Yang, Jung-Wei Chen, Jian-De Leu, Guan-Lin Pan
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Publication number: 20090153349Abstract: The present invention discloses a method of controlling a controlled object by detecting a movement of a handheld controller, wherein the handheld controller comprises a central processing unit, a sensor, and a database, wherein the sensor is operated to detect the movement of the handheld controller, and the database is applied to store correction parameters. First, the sensor is applied to detect a movement of the handheld controller, to generate a signal, and to transfer the signal to the central processing unit, wherein the signal contains coordinates of the movement in a first coordinate system. After applying the central processing unit to send a request to the database to inquire a corresponding correction parameter of said signal, the database is applied to send the correction parameter to the central processing unit.Type: ApplicationFiled: April 16, 2008Publication date: June 18, 2009Inventors: Chin-Hung Lin, Jheng-Hei Pan, Jung-Wei Chen
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Publication number: 20070124525Abstract: Disclosed is a system and method for processing data retrieval/storage, which includes a memory data BUS and a logic converter circuit adopted for switching a non-IDE electrical level into an IDE electrical level, and also for switching a address line to an IDE address line, a data line to an IDE data line, a chip select line to nIDE channel chip select line, a control line to IDE control line, and through the nIDE channel chip select line to process channel locating to a IDE device of a IDE channel. Thus, it is possible that the memory data BUS can process data retrieval/storage to the IDE devices in many IDE channels.Type: ApplicationFiled: November 30, 2005Publication date: May 31, 2007Applicant: PHISON ELECTRONICS CORP.Inventors: Feng-Min Shen, Jung-Wei Chen
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Publication number: 20070088908Abstract: The present invention discloses a method for arranging heap memory. The method is to utilize a memory-management function library positioned in the run-time library for use during run time and designate two sets of heap memory, wherein one set of heap memory is arranged in a dynamic random access memory (DRAM) whereas the other set of heap memory is arranged in a static random access memory (SRAM). In addition, an application program interface is added to indicate a start point and size of the heap memory. Furthermore, a parameter is added to the application program interface for calling one set of heap memory when allocating memory. By doing so, the programmer can select a position to allocate the memory according to the executable content. Therefore, when the processor is executing calculation or accessing memory, the efficiency can be well enhanced.Type: ApplicationFiled: October 17, 2005Publication date: April 19, 2007Applicant: PHISON ELECTRONICS CORP.Inventor: Jung-Wei Chen
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Publication number: 20050184161Abstract: A multimedia card reader is disclosed. The card reader has a USB connector; a slot, for receiving a memory card; a data storage device, for saving/retrieving/transmitting data into/from/to the memory card; and a digital signal processor; a USB controller, connected to the digital signal processor and the USB connector, the date storage device and the slot; a signal amplifier, connected to an audio signal output terminal, wherein the digital signal processor is connected to the signal amplifier and an video signal output terminal, wherein an audio or a video data is converted into an audio signal or a video signal by the digital signal processor, and wherein the audio signal is transmitted to the signal amplifier and output via audio signal output terminal or the video signal is output via video signal output terminal.Type: ApplicationFiled: February 20, 2004Publication date: August 25, 2005Inventors: Jung-Wei Chen, Feng-Min Shen, Horace Chen