Abstract: An external high/low voltage compatible semiconductor memory device includes an internal voltage pad, an internal voltage generation circuit, and an internal voltage control signal generation circuit. The internal voltage pad connects a low external voltage with an internal voltage, and the internal voltage generation circuit generates an internal voltage in response to an internal voltage control signal and a high external voltage. The internal voltage control signal generation circuit generates an internal voltage control signal according to an high or low external voltage. Thus, a database of the semiconductor memory device can be managed without classifying the database into databases for the high voltage and databases for the low voltage because of the internal voltage control signal. In addition, the internal voltage level is stable because charges provided to the internal voltage are regulated according to a voltage level of the external voltage.

Abstract: The present invention discloses a semiconductor memory device and a method of generating a block selection signal for the semiconductor memory device. The semiconductor memory device includes 2n groups comprised of m memory cell array blocks and each of the memory cell array blocks has (2k+a) word lines. The semiconductor memory device further includes a first block selection signal generating circuit for generating first block selection signals for selecting one group of the 2n groups by decoding a n-bit row address, a second block selection signal generating circuit for generating second block selection signals for selecting one memory cell array block in every group by decoding a l-bit row address, and a third block selection signal generating circuit for generating third block selection signals for selecting one memory cell array block out of (m×2n) memory cell array blocks by receiving the first block selection signals and the second block selection signals.