Patents by Inventor Jung-Yuan Hsieh

Jung-Yuan Hsieh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20200054555
    Abstract: A contact lens with functional components and products thereof are disclosed, wherein at least one bonding agent is added to the polymeric matrix material of the lens body. The bonding agent can effectively integrate with various kinds of functional components to improve the characteristics of the lens body, increase the comfort of wearing the contact lens, and enhance the ability of water retention. While the user wears the contact lens, the contact lens can release the functional components persistently. Therefore, the present invention can relieve irritations caused by dust, dirt, smoke, and/or pollution from the environment.
    Type: Application
    Filed: November 27, 2018
    Publication date: February 20, 2020
    Inventors: BISHAKH ROUT, CHIH-CHUNG WANG, JUNG-YUAN HSIEH
  • Patent number: 8722538
    Abstract: A method for forming a contact window includes: a step of providing a substrate; a step of forming a patterned amorphous carbon layer or spin-on coating layer, in which a surface of the substrate is exposed at two sides of the amorphous carbon layer or spin-on coating layer; a step of forming an interlayer dielectric layer on the substrate; a step of removing a portion of the interlayer dielectric layer until the patterned amorphous carbon layer or spin-on coating layer is exposed; a step of removing the patterned amorphous carbon layer or spin-on coating layer to form an opening; and a step of filling the opening with a conductive material to form the contact window.
    Type: Grant
    Filed: September 12, 2012
    Date of Patent: May 13, 2014
    Assignee: Powerchip Technology Corporation
    Inventors: Jung-Yuan Hsieh, Shih-Hsi Chen, Jin-Ren Han
  • Publication number: 20140011357
    Abstract: A method for forming a contact window includes: a step of providing a substrate; a step of forming a patterned amorphous carbon layer or spin-on coating layer, in which a surface of the substrate is exposed at two sides of the amorphous carbon layer or spin-on coating layer; a step of forming an interlayer dielectric layer on the substrate; a step of removing a portion of the interlayer dielectric layer until the patterned amorphous carbon layer or spin-on coating layer is exposed; a step of removing the patterned amorphous carbon layer or spin-on coating layer to form an opening; and a step of filling the opening with a conductive material to form the contact window.
    Type: Application
    Filed: September 12, 2012
    Publication date: January 9, 2014
    Applicant: POWERCHIP TECHNOLOGY CORPORATION
    Inventors: Jung-Yuan Hsieh, Shih-Hsi Chen, Jin-Ren Han
  • Publication number: 20100081273
    Abstract: A method for fabricating a conductive pattern including following steps is provided. A first conductive layer is formed on a substrate. A patterned hard mask layer is formed on the first conductive layer. A portion of the first conductive layer is removed to expose a portion of the substrate by using the patterned hard mask layer as a mask. A dielectric layer covering the patterned hard mask layer is formed on the substrate. A portion of the dielectric layer is removed to expose the patterned hard mask layer. The patterned hard mask layer is removed to form an opening in the dielectric layer. A second conductive layer is formed in the opening.
    Type: Application
    Filed: September 30, 2008
    Publication date: April 1, 2010
    Applicant: POWERCHIP SEMICONDUCTOR CORP.
    Inventors: Jung-Yuan Hsieh, Yung-Ching Chen
  • Publication number: 20040203231
    Abstract: A method for forming a contact plug is described. First, two gates are formed on a semiconductor substrate. Thereafter, a first dielectric layer is deposited on the semiconductor substrate, and then etched back to form a spacer on sidewalls of the gates. An ion implantation is performed to form a source and a drain region in the semiconductor substrate. Then, a conductive layer is deposited on the semiconductor substrate and the transistor. A portion of the conductive layer is removed to while leaving a retained conductive layer disposed over the source region and the drain region. Finally, a second dielectric layer is deposited on the semiconductor substrate, the transistor and the retained conductive layer.
    Type: Application
    Filed: April 14, 2003
    Publication date: October 14, 2004
    Inventor: Jung-Yuan Hsieh