Abstract: The present invention is a method and structure for placing resistive circuits underneath a bonding pad in integrated circuit devices such that the resistive circuits are protected from shear and compressive stresses during bonding processes. The resistor is a serpentine wire pattern. A bonding pad is formed above the resistor such that the serpentine pattern extends over the entire bond pad area. The method and structure allow the formation of IC devices with smaller die areas.

Abstract: The present invention provides a bonding pad structure for integrated circuit devices which allows the active circuits to be placed under bonding pads of the device without affecting the performance of the active circuits. The bonding pad structure is composed of at least two metal layers overlying the active circuits so that the bonding pad may be subjected to thermal and mechanical stresses without damaging the underlying active circuits. The metal layer underlying the bonding pad is patterned and etched forming an array of openings in the metal that may take any shape, e.g. slots, grid, circles. The present invention enables a reduction in the chip area and eliminates the parasitic resistance due to long interconnection wires between bonding pads and active regions.

Abstract: The present invention is a method and structure for placing resistive circuits underneath a bonding pad in integrated circuit devices such that the resistive circuits are protected from shear and compressive stresses during bonding processes. The resistor is a serpentine wire pattern. A bonding pad is formed above the resistor such that the serpentine pattern extends over the entire bond pad area. The method and structure allow the formation of IC devices with smaller die areas.

Abstract: The present invention is a method and structure for placing resistive circuits underneath a bonding pad in integrated circuit devices such that the resistive circuits are protected from shear and compressive stresses during bonding processes. The resistor is a serpentine wire pattern. A bonding pad is formed above the resistor such that the serpentine pattern extends over the entire bond pad area. The method and structure allow the formation of IC devices with smaller die areas.

Abstract: A driver having a cascode stage with a common gate transistor that provides an output transmit signal at a driver output node. A protection circuit includes a resistor coupled to bias a gate of the common gate transistor to a clamp voltage. The resistor has a resistance value at least large enough to allow the gate voltage to follow some of a transition in the driver output node voltage when the driver is not transmitting. The resistance value may also be selected to delay the gate voltage from returning to the clamp voltage following the transition, so that the voltage between the gate and a source of the common gate transistor does not reach a level that can damage the common gate transistor.

Abstract: The present invention provides a bonding pad structure for integrated circuit devices which allows the active circuits to be placed under bonding pads of the device without affecting the performance of the active circuits. The bonding pad structure is composed of at least two metal layers overlying the active circuits so that the bonding pad may be subjected to thermal and mechanical stresses without damaging the underlying active circuits. The metal layer underlying the bonding pad is patterned and etched forming an array of openings in the metal that may take any shape, e.g. slots, grid, circles. The present invention enables a reduction in the chip area and eliminates the parasitic resistance due to long interconnection wires between bonding pads and active regions.