Abstract: Provided is a multi-stack cure system. The system includes a chamber having an inlet port and an outlet port. A magazine is mounted in the chamber. A plurality of substrates having encapsulants are loaded in the magazine. A heater is mounted at the chamber and serves to heat the plurality of substrates having the encapsulants. A loading unit is positioned adjacent the inlet port. The loading unit has a transfer device and a push bar. A substrate recognition device is mounted in the loading unit. A control device is connected to the substrate recognition device. The inlet port has a size larger than each of the plurality of substrates having the encapsulants and smaller than the magazine.

Abstract: Provided is a multi-stack cure system. The system includes a chamber having an inlet port and an outlet port. A magazine is mounted in the chamber. A plurality of substrates having encapsulants are loaded in the magazine. A heater is mounted at the chamber and serves to heat the plurality of substrates having the encapsulants. A loading unit is positioned adjacent the inlet port. The loading unit has a transfer device and a push bar. A substrate recognition device is mounted in the loading unit. A control device is connected to the substrate recognition device. The inlet port has a size larger than each of the plurality of substrates having the encapsulants and smaller than the magazine.

Abstract: A coverage apparatus and method for testing a multi-thread environment is provided. The coverage apparatus and method analyzes an application to search for synchronization blocks, forcedly schedules an execution order of a plurality of threads including the detected synchronization blocks in such a manner as to induce execution conflicts of the synchronization blocks, and then executes the threads in the scheduled order to perform coverage of the corresponding application.

Abstract: An instrumentation apparatus and method capable of adding an additional operation to an execution program, are provided. A processor for supporting instrumentation assigns an instrumentation bit to an instruction that includes instrumentation code that needs to be executed. The processor jumps to an address of a memory for execution of the instrumentation code, and stores the jump address in a register. If a fetched instruction includes the instrumentation bit, the processor jumps to the jump address stored in the register and executes the instrumentation code.

Abstract: A visual interface providing method for efficiently providing information about errors occurring in a multi-thread operation state. Error log information about at least one error generated during multi-thread processing of program code may be generated. The error log information may be converted into a markup language file according to a predetermined document type definition that specifies at least one information item used for a visual interface with respect to an error. The visual interface may be provided by rendering the markup language file, wherein the visual interface includes thread information including at least one of general information about at least one thread in which an error has occurred and error information about the error, and time information about a time period during which the at least one thread is executed.

Abstract: A parallel programming adjusting apparatus and method are provided. Parameter sets are made by grouping parameters of a parallel programming model influencing the system performance, the parameter sets are combined among the groups, generating parameter combinations. Execution files are executed for the individual parameter combinations and a runtime of a parallel region for respective parameter combination is measured. An optimum parameter combination is selected based on the measured runtime.

Abstract: A multi-unit fuel cell system that includes a common-use reforming unit configured to supply hydrogen to multiple fuel cell units that are installed in multiple units, such as apartments within an apartment building. In one example embodiment, a fuel cell system including a common-use reforming unit and multiple fuel cell units is disclosed. The common-use reforming unit is configured to supply hydrogen to the plurality of fuel cell units. Each fuel cell unit includes a stack unit, an air supplying unit, an integral heat exchange unit, a hot-water supplying unit, an auxiliary heat supplying unit, and an electric output unit.

Abstract: The present invention relates to an isoxazoline derivative as an inhibitor against various caspases, a process for preparing the same, and a therapeutic composition for preventing inflammation and apoptosis comprising the same.

Abstract: A multi-unit fuel cell system that includes a common-use reforming unit configured to supply hydrogen to multiple fuel cell units that are installed in multiple units, such as apartments within an apartment building. In one example embodiment, a fuel cell system including a common-use reforming unit and multiple fuel cell units is disclosed. The common-use reforming unit is configured to supply hydrogen to the plurality of fuel cell units. Each fuel cell unit includes a stack unit, an air supplying unit, an integral heat exchange unit, a hot-water supplying unit, an auxiliary heat supplying unit, and an electric output unit.

Abstract: A fuel cell system includes a stack unit which generates electricity by an electrochemical reaction between air and hydrogen. A fuel supply unit supplies hydrogen to the stack unit, and an air supply unit supplies air to the stack unit. A load corresponding unit measures an amount of electricity drawn from the stack unit by a load, and controls an amount of electricity generated by the stack unit based on the measurement.

Abstract: The present invention relates to an isoxazoline derivative as an inhibitor against various caspases, a process for preparing the same, and a therapeutic composition for preventing inflammation and apoptosis comprising the same

Abstract: A system for shortening the class loading process in a Java program according to the present invention includes a class loader unit for loading Java program class files from an auxiliary memory, performing linking and initialization processes and generating runtime data; a first memory unit for maintaining the runtime data generated by the class loader unit in an accessible state; a second memory unit for storing the runtime data, which have been loaded into the first memory unit in an accessible state, in the form of images; a runtime data search unit for loading the runtime data, which have been stored in the second memory unit in the form of images, into the first memory unit upon the request of the class loader unit; and an execution unit for executing the runtime data that have been loaded into the first memory unit in an accessible state.

Abstract: The present invention relates to humanized monoclonal antibodies LB-00503 and LB-00506, which are specific for human 4-1BB molecules, have high binding affinities and can bind efficiently with activated T cells expressing the 4-1BB molecule, as well as pharmaceutical compositions. Particularly, the present invention provides said humanized antibody LB-00503, which is modified from the humanized antibody Hz4B4-2 and substitutes the 61st amino acid, serine by asparagine in the amino acid residues of 59th˜61st and said humanized antibody LB-00506, which enhances the antibody binding affinity of said humanized antibody LB-00503 in which 2 amino acid residues of the right border in the antibody binding site CDR2 of the heavy chain variable region are substituted from glutamine (Q)—glycine (G) to lysine (K)—serine (S).