Patents by Inventor Jung-Hoon Jun

Jung-Hoon Jun has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Semiconductor device and method of manufacturing the same
    Patent number: 10083978
    Abstract: A method of forming a nonvolatile memory device includes forming first, second, and third gate structures, with the second and third gate structures including first and second spacer structures formed on a sidewall of the second gate structure and sidewalls of the third gate structure. Impurity regions are formed through ion implantation and the first spacer structure shields the second and third gate structures during ion implantation. The second spacer structure defines resulting impurity regions.
    Type: Grant
    Filed: January 11, 2018
    Date of Patent: September 25, 2018
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Dong-Won Kim, Bong-Tae Park, Ho-Jun Seong, Jae-Hwang Sim, Jung-Hoon Jun
  • SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME
    Publication number: 20180138188
    Abstract: A method of forming a nonvolatile memory device includes forming first, second, and third gate structures, with the second and third gate structures including first and second spacer structures formed on a sidewall of the second gate structure and sidewalls of the third gate structure. Impurity regions are formed through ion implantation and the first spacer structure shields the second and third gate structures during ion implantation. The second spacer structure defines resulting impurity regions.
    Type: Application
    Filed: January 11, 2018
    Publication date: May 17, 2018
    Inventors: Dong-Won Kim, Bong-Tae Park, Ho-Jun Seong, Jae-Hwang Sim, Jung-Hoon Jun
  • SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME
    Publication number: 20180061843
    Abstract: A method of forming a nonvolatile memory device includes forming first, second, and third gate structures, with the second and third gate structures including first and second spacer structures formed on a sidewall of the second gate structure and sidewalls of the third gate structure. Impurity regions are formed through ion implantation and the first spacer structure shields the second and third gate structures during ion implantation. The second spacer structure defines resulting impurity regions.
    Type: Application
    Filed: March 29, 2017
    Publication date: March 1, 2018
    Inventors: Dong-Won Kim, Bong-Tae Park, Ho-Jun Seong, Jae-Hwang Sim, Jung-Hoon Jun
  • Semiconductor device and method of manufacturing the same
    Patent number: 9905569
    Abstract: A method of forming a nonvolatile memory device includes forming first, second, and third gate structures, with the second and third gate structures including first and second spacer structures formed on a sidewall of the second gate structure and sidewalls of the third gate structure. Impurity regions are formed through ion implantation and the first spacer structure shields the second and third gate structures during ion implantation. The second spacer structure defines resulting impurity regions.
    Type: Grant
    Filed: March 29, 2017
    Date of Patent: February 27, 2018
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Dong-Won Kim, Bong-Tae Park, Ho-Jun Seong, Jae-Hwang Sim, Jung-Hoon Jun