Abstract: A display panel driving apparatus includes a data driving part, a data driving part and an off voltage controlling part. The data driving part is configured to output a data signal to a data line of a display panel. The gate driving part is configured to output a gate signal to a gate line of the display panel. The off voltage controlling part is configured to receive a first off voltage and a second off voltage applied to the gate driving part to generate the gate signal, measure a leakage current of the gate driving part, and control the first off voltage based on the leakage current. Thus, display quality of a display apparatus including the gate driving part may be improved.

Abstract: A display panel driving apparatus includes a data driving part, a data driving part and an off voltage controlling part. The data driving part is configured to output a data signal to a data line of a display panel. The gate driving part is configured to output a gate signal to a gate line of the display panel. The off voltage controlling part is configured to receive a first off voltage and a second off voltage applied to the gate driving part to generate the gate signal, measure a leakage current of the gate driving part, and control the first off voltage based on the leakage current. Thus, display quality of a display apparatus including the gate driving part may be improved.

Abstract: A display panel driving apparatus includes a data driving part, a gate driving part and an off voltage controlling part. The data driving part is configured to output a data signal to a data line of a display panel. The gate driving part is configured to output a gate signal to a gate line of the display panel. The off voltage controlling part is configured to receive a first off voltage and a second off voltage applied to the gate driving part to generate the gate signal, measure a leakage current of the gate driving part, and control the first off voltage based on the leakage current. Thus, display quality of a display apparatus including the gate driving part may be enhanced.

Abstract: A data driver includes a receiver, a transition minimization coding (“TMC”) decoder, a dithering adder and a voltage generator. The receiver receives a clock signal and first image data which is generating by removing a dithering from a dithered original image data and performing a TMC. The TMC decoder removes the TMC from the first image data to generate second image data. The dithering adder restores the removed dithering based on the clock signal and the second image data to generate third image data. The voltage generator generates a plurality of data voltages based on the third image data.

Abstract: A display panel driving apparatus includes an over-driving part, where the over-driving part is configured to receive first image data, and to output second image data using first over-driving data and second over-driving data, the first over-driving data is generated according to previous frame data and present frame data for a minimum blank period between the previous frame data and the present frame data of the first image data, the second over-driving data is generated according to the previous frame data and the present frame data for a maximum blank period between the previous frame data and the present frame data of the first image data, and a high display quality of a display apparatus may be achieved.

Abstract: A display apparatus includes a display panel, a first timing controller, a second timing controller and a third timing controller. The first timing controller controls an operation of a first region in the display panel, and generates a reference clock signal. The second timing controller controls an operation of a second region in the display panel, and receives the reference clock signal. The third timing controller controls an operation of a third region in the display panel, and receives the reference clock signal. The first, second and third timing controllers are synchronized with one another in response to the reference clock signal and a state synchronization signal, and operate in one of a plurality of states depending on an operation of the display apparatus.

Abstract: A display apparatus includes a display panel comprising a plurality of data lines and a plurality of gate lines crossing the plurality of data lines, a frequency detector configured to receive an input synchronization signal with an input frequency which is varying in a preset frequency range and to count clock cycles of an input frame in the input synchronization signal, and a synchronization signal generator configured to generate an output synchronization signal which has an insertion frame corresponding to a frame of maximum frequency within the preset frequency range and inset the insertion frame in a vertical blanking period of the input frame, based on the clock count.

Abstract: A display apparatus includes a display panel, a first timing controller, a second timing controller and a third timing controller. The first timing controller controls an operation of a first region in the display panel, and generates a reference clock signal. The second timing controller controls an operation of a second region in the display panel, and receives the reference clock signal. The third timing controller controls an operation of a third region in the display panel, and receives the reference clock signal. The first, second and third timing controllers are synchronized with one another in response to the reference clock signal and a state synchronization signal, and operate in one of a plurality of states depending on an operation of the display apparatus.

Abstract: A data driver includes a receiver, a transition minimization coding (“TMC”) decoder, a dithering adder and a voltage generator. The receiver receives a clock signal and first image data which is generating by removing a dithering from a dithered original image data and performing a TMC. The TMC decoder removes the TMC from the first image data to generate second image data. The dithering adder restores the removed dithering based on the clock signal and the second image data to generate third image data. The voltage generator generates a plurality of data voltages based on the third image data.

Abstract: A display panel driving apparatus includes an over-driving part, where the over-driving part is configured to receive first image data, and to output second image data using first over-driving data and second over-driving data, the first over-driving data is generated according to previous frame data and present frame data for a minimum blank period between the previous frame data and the present frame data of the first image data, the second over-driving data is generated according to the previous frame data and the present frame data for a maximum blank period between the previous frame data and the present frame data of the first image data, and a high display quality of a display apparatus may be achieved.

Abstract: A display apparatus includes a display panel comprising a plurality of data lines and a plurality of gate lines crossing the plurality of data lines, a frequency detector configured to receive an input synchronization signal with an input frequency which is varying in a preset frequency range and to count clock cycles of an input frame in the input synchronization signal, and a synchronization signal generator configured to generate an output synchronization signal which has an insertion frame corresponding to a frame of maximum frequency within the preset frequency range and inset the insertion frame in a vertical blanking period of the input frame, based on the clock count.

Abstract: A display panel driving apparatus includes a data driving part, a data driving part and an off voltage controlling part. The data driving part is configured to output a data signal to a data line of a display panel. The gate driving part is configured to output a gate signal to a gate line of the display panel. The off voltage controlling part is configured to receive a first off voltage and a second off voltage applied to the gate driving part to generate the gate signal, measure a leakage current of the gate driving part, and control the first off voltage based on the leakage current. Thus, display quality of a display apparatus including the gate driving part may be improved.

Abstract: A display apparatus includes a display panel, a data driving part, and a timing control part. The display panel includes gate lines extending in a first direction, data lines extending in a second direction crossing the first direction, and first and second pixel groups. The first and second pixel groups are disposed at opposing sides of a data line and are alternately connected to the data line. The data driving part includes channels connected to the data lines. The channels output a data signal to the data lines, the data signal has a first polarity or a second polarity, and the second polarity has an inversed phase to the first polarity. The timing control part outputs a data inverse control signal and first and second polarity control signal, which control the polarity of the data signal based on the data inverse control signal.

Abstract: A display panel driving apparatus includes a timing controlling part, a data driving part and a gate driving part. The timing controlling part outputs a first line data of an image data, and determines whether the first line data and a second line data next to the first line data are the same. The data driving part outputs a first line data signal based on the first line data to a data line corresponding to a first line, and outputs the first line data signal based on the first line data to a data line corresponding to a second line, when the first line data and the second line data are the same.

Abstract: A method to drive a display device includes: transmitting at least one data voltage to one or more of a plurality of data lines, scanning one or more of a plurality of gate lines to enable transmission of a gate signal in association with a first frame of a first hold section of a first still image section associated with display of a still image, and scanning one or more of the plurality of gate lines to enable transmission of the gate signal every frame of a first refresh section. The first still image section comprises the first refresh section.

Abstract: Provided is a method of driving a display panel, including: outputting first data voltages representing a left-eye image or a right-eye image to first signal lines among a plurality of signal lines of the display panel during a first period of a frame for rendering the left-eye or right-eye image of a three-dimensional (3D) image; outputting second data voltages representing the left-eye image or right-eye image for second signals among the plurality of signal lines of the display panel during a second period of the frame for rendering the left-eye or right-eye image of the 3D image; and stopping the data voltages from being outputted to the display panel during a third period of the frame.

Abstract: A method of driving a display panel includes outputting a data voltage of a first-eye data frame to a plurality of data lines of the display panel in a first normal frame, and outputting a partial line data voltage of the first-eye data frame to a first partial line of the plurality of data lines of the display panel in a first partial frame, where a polarity of the partial line data voltage of the first-eye data frame in the first partial frame is substantially the same as a polarity of the data voltage of the first-eye data frame outputted to the first partial line of the plurality of data lines in the first normal frame, and where an interval of the first partial frame is less than an interval of the first normal frame.

Abstract: A display device includes first and second pixels, first and second gate lines which transfer first and second gate-on voltages, respectively, to the first and second pixels in a first frame and a second frame, respectively, a first data line which transfers a first data voltage to the first pixel in the second frame and a second data line which transfers a second data voltage to the second pixel in the first frame. The first pixel stores the first data voltage as a first stored data voltage in response to the first gate-on voltage and discharges the first stored data voltage in response to the second gate-on voltage. The second pixel stores the second data voltage as a second stored data voltage in response to the second gate-on voltage and discharges the second stored data voltage in response to the first gate-on voltage.

Abstract: A method of processing data for driving a display panel including a pixel structure including red, green, blue and white (RGBW) sub-pixels includes receiving red, green and blue (RGB) data at a first frame frequency. The method further includes generating RGBW data at a second frame frequency, greater than the first frame frequency, using the RGB data.

Abstract: A display apparatus includes a plurality of frame rate controllers that generate a motion interpolated intermediate image. The frame rate controllers exchange image information with adjacent frame rate controllers. According to the display apparatus, each frame rate controller displays the intermediate image on a corresponding display area based on the image information provided from the adjacent frame rate controller.