Abstract: A method of generating a defect image for deep learning and a system therefor are provided. The method and the system are intended to be used in generating training data for an artificial intelligence algorithm. More specifically, the training data are defect images required to train an algorithm that identifies a defect from a product.

Abstract: A display driver includes first and second level shifters, respectively receiving a digital signal's most significant bit (MSB) and the digital signal's non-MSB. The first level shifter includes a first input terminal, a first output terminal via which a signal input to the first input terminal is output, a second input terminal, and a second output terminal via which a signal input to the second input terminal is output. The second level shifter includes a third input terminal, a third output terminal via which a signal input to the third input terminal is output, a fourth input terminal, and a fourth output terminal via which a signal input to the fourth input terminal is output. The first input terminal receives an inverted MSB, the second input terminal receives the MSB, the third input terminal receives the non-MSB, and the fourth input terminal receives the inverted non-MSB.

Abstract: A method of generating a defect image for deep learning and a system therefor are provided. The method and the system are intended to be used in generating training data for an artificial intelligence algorithm. More specifically, the training data are defect images required to train an algorithm that identifies a defect from a product.

Abstract: A display driver includes first and second level shifters, respectively receiving a digital signal's most significant bit (MSB) and the digital signal's non-MSB. The first level shifter includes a first input terminal, a first output terminal via which a signal input to the first input terminal is output, a second input terminal, and a second output terminal via which a signal input to the second input terminal is output. The second level shifter includes a third input terminal, a third output terminal via which a signal input to the third input terminal is output, a fourth input terminal, and a fourth output terminal via which a signal input to the fourth input terminal is output. The first input terminal receives an inverted MSB, the second input terminal receives the MSB, the third input terminal receives the non-MSB, and the fourth input terminal receives the inverted non-MSB.

Abstract: A pixel includes an organic light emitting diode (OLED); a first transistor between a driving power and a first node, having a gate connected to a control line; a second transistor between the first node and a second node, having a gate connected to a second electrode of a seventh transistor; a third transistor between the second node and an anode electrode of the OLED, having a gate connected to the control line; a fourth transistor between the first node and a data line; a fifth transistor between the second node and a storage capacitor; a sixth transistor between an initialization power and the anode electrode, the fourth to sixth transistors having gates connected to a scan line; the seventh transistor connected to the initialization power and the gate of the second transistor, having a gate connected to another scan line, all transistors being oxide semiconductor thin film transistors.

Abstract: A pixel includes an organic light emitting diode (OLED), a first transistor connected to a driver and a first node, having a gate connected to a control line, a second transistor between to the first node and a second node, having a gate connected to a third node, a third transistor connected to an anode of the OLED, having a gate connected to the control line, a fourth transistor between the first node and a data line, having a gate connected to a scan line, a fifth transistor between the second and third nodes, having a gate connected to the scan line, a sixth transistor between an initializing line and the anode, having a gate connected to the scan line, a seventh transistor between the initializing line and the third node, having a gate connected to another scan line, and a storage capacitor between the driver and the third node.

Abstract: A display driving circuit is provided. The display driving circuit includes: an input control circuit configured to output an input current in response to a sensing current output from at least one pixel; a sampling circuit configured to output a sampling voltage which is a reference voltage during a reset period, and which is a voltage varying based on the reference voltage and the input current during a signal period; and an accumulating circuit configured to generate an output voltage by accumulating variation values of the sampling voltage, and provide the generated output voltage to an analog-to-digital converter (ADC) circuit, wherein the sampling voltage decreases or increases from the reference voltage according to the input current during the signal period.

Abstract: A pixel includes an organic light emitting diode (OLED); a first transistor between a driving power and a first node, having a gate connected to a control line; a second transistor between the first node and a second node, having a gate connected to a second electrode of a seventh transistor; a third transistor between the second node and an anode electrode of the OLED, having a gate connected to the control line; a fourth transistor between the first node and a data line; a fifth transistor between the second node and a storage capacitor; a sixth transistor between an initialization power and the anode electrode, the fourth to sixth transistors having gates connected to a scan line; the seventh transistor connected to the initialization power and the gate of the second transistor, having a gate connected to another scan line, all transistors being oxide semiconductor thin film transistors.

Abstract: A pixel includes an organic light emitting diode (OLED), a first transistor connected to a driver and a first node, having a gate connected to a control line, a second transistor between to the first node and a second node, having a gate connected to a third node, a third transistor connected to an anode of the OLED, having a gate connected to the control line, a fourth transistor between the first node and a data line, having a gate connected to a scan line, a fifth transistor between the second and third nodes, having a gate connected to the scan line, a sixth transistor between an initializing line and the anode, having a gate connected to the scan line, a seventh transistor between the initializing line and the third node, having a gate connected to another scan line, and a storage capacitor between the driver and the third node.

Abstract: Disclosed is an energy harvesting apparatus. The energy harvesting apparatus includes a rectifier for rectifying an alternating current (AC) voltage supplied from an energy source into a direct current (DC) voltage, a charging unit for storing an output voltage of the rectifier, and a maximum power point tracker selectively connected between the rectifier and the charging unit, for differentiating the output voltage of the rectifier in a first connection state, and for controlling the output voltage of the rectifier based on a differentiation result.

Abstract: Provided is a ramp signal generating apparatus. The ramp signal generating apparatus includes N (N is a natural number) ramp signal generating cells that are connected in series to each other. Each of the ramp signal generating cells includes a power voltage unit for supplying current source, a latch unit for latching an output voltage of the power voltage unit, and a switch unit for outputting the voltage latched by the latch unit as an output voltage in response to an input signal.

Abstract: Provided is a ramp signal generating apparatus. The ramp signal generating apparatus includes N (N is a natural number) ramp signal generating cells that are connected in series to each other. Each of the ramp signal generating cells includes a power voltage unit for supplying current source, a latch unit for latching an output voltage of the power voltage unit, and a switch unit for outputting the voltage latched by the latch unit as an output voltage in response to an input signal.

Abstract: Disclosed is an energy harvesting apparatus. The energy harvesting apparatus includes a rectifier for rectifying an alternating current (AC) voltage supplied from an energy source into a direct current (DC) voltage, a charging unit for storing an output voltage of the rectifier, and a maximum power point tracker selectively connected between the rectifier and the charging unit, for differentiating the output voltage of the rectifier in a first connection state, and for controlling the output voltage of the rectifier based on a differentiation result.

Abstract: Provided is a single inductor multiple output (SIMO) direct current-to-direct current (DC/DC) converter that may perform DC/DC conversion by transferring, to output nodes, input current that is input and thereby stored in a single inductor. An output selection unit of the SIMO DC/DC converter may select, from output nodes, a first output node to be supplied with current from a driving unit, and provide output voltage of the first output node and reference voltage of the first output node to a hysteresis comparison unit. The hysteresis comparison unit may control on-time and/or inductor peak current by determining whether the output voltage of the first output node is higher than the reference voltage of the first output node by at least a first threshold, and whether the output voltage of the first output voltage is lower than the reference voltage of the first output voltage by at least a second threshold.

Abstract: Provided is a single inductor multiple output (SIMO) direct current-to-direct current (DC/DC) converter that may perform DC/DC conversion by transferring, to output nodes, input current that is input and thereby stored in a single inductor. An output selection unit of the SIMO DC/DC converter may select, from output nodes, a first output node to be supplied with current from a driving unit, and provide output voltage of the first output node and reference voltage of the first output node to a hysteresis comparison unit. The hysteresis comparison unit may control on-time and/or inductor peak current by determining whether the output voltage of the first output node is higher than the reference voltage of the first output node by at least a first threshold, and whether the output voltage of the first output voltage is lower than the reference voltage of the first output voltage by at least a second threshold.

Abstract: Non-activated tissue-regeneration polypeptides (TRPs) and their preparation methods are disclosed. The TRPs include: a protein transduction domain (PTD) making the polypeptides to permeate a cell membrane without cell membrane receptors; a furin activation domain (FAD) which has at least one proprotein convertase cleavage site and which can be cleaved by the proprotein convertase and activate a tissue regeneration domain (TRD) in cells; and a tissue regeneration domain (TRD) which can be activated by the proprotein convertase cleavage of the FAD to stimulate the growth or formation of tissues or to induce the regeneration of tissues. The TRPs can be mass-produced by cultured bacteria, such as recombinant E. coli, are in a non-activated state before in vivo administration, and their separation, purification, handling, storage and administration are simple and convenient.

Abstract: The present invention relates to non-activated Wnt inhibition polypeptides (WIPs) containing: (a) a protein transduction domain (PTD) which enables said WIPs to permeate a cell membrane without the aid of a cell membrane receptor; and (b) a Wnt antagonist domain which is inactive by itself, but is activated in mammalian cells and then secreted out of the cells to function to inhibit Wnt signal transduction. Also, the invention relates to a method for preparing said non-activated WIPs, and a pharmaceutical composition containing said WIPs as active ingredients. Said non-activated WIPs can be produced in large quantities through the culture of bacteria such as E coli., and are biochemically inactive before being administered into the human body, and thus the production cost thereof is only one several tenths of that of previously known active proteins (sFRPs, DKKs, etc.

Abstract: Disclosed is an orthodontic implant having a head part formed at an upper end thereof, a connection part for connection of an elastic member, a tool engagement part for engagement of a tool, a uniform diameter part, and a screw part having a predetermined length to be driven into an alveolar bone, which are sequentially formed in a downward direction. The screw part of the present invention has a sectional shape of an inverted cone which is widened at an upper end thereof and pointed at a lowered end thereof, and a pre-selected upper portion of a thread of the screw part, which portion corresponds to one or more leads of the thread, is formed to have a flattened crest of a predetermined width, and the remaining portion of the threads of the screw part are formed to have sharp-edged crest.