Abstract: A semiconductor memory device and method thereof are provided. The example semiconductor memory device may include a first processor configured to exchange data with a first data length format, a second processor configured to exchange data with a second data length format and a shared memory configured to store data, the shared memory being shared by the first and second processors, the shared memory further configured to receive a read command from at least one of the first and second processors and to output data in response to the read command based on which of the first and second data length formats is used by the processor issuing the read command.

Abstract: A semiconductor memory device and method thereof are provided. The example semiconductor memory device may include a first processor configured to exchange data with a first data length format, a second processor configured to exchange data with a second data length format and a shared memory configured to store data, the shared memory being shared by the first and second processors, the shared memory further configured to receive a read command from at least one of the first and second processors and to output data in response to the read command based on which of the first and second data length formats is used by the processor issuing the read command.

Abstract: A method of controlling a bank voltage (AIVC) through memory block selection information, said method comprising the steps of detecting an array block selection signal of an array block disposed distantly from an AIVC driver in response to an activated memory array block selection signal; and supplying a second bank voltage to a memory bank by driving a normal size driver and an oversize driver when detecting the array block selection signal for the distantly disposed array block.

Abstract: An apparatus for and method of controlling AIVC through block selection information in a semiconductor memory device. The apparatus and method vary a block voltage supplied to an array block depending on a location of the array block in a memory bank.