Abstract: The semiconductor package according to the present invention comprises: an integrated substrate; a bottom chip stack, which is mounted on the integrated substrate, has multiple memory semiconductor dies stacked chip-on-chip, and takes charge of a part of the whole memory capacity; at least one top chip stack, which is mounted on the bottom package, has multiple memory semiconductor dies mounted therein, and takes charge of the rest of the whole memory capacity; an integration wire for electrically connecting the bottom chip stack and the top chip stack(s); and an integration protection member for sealing the integration wire.

Abstract: A wearable smart device of the present invention comprises: a main body on which a basic module is mounted; a band on which at least one auxiliary module is mounted, which is selectively attached and detached to the main body made of a polymer material or a rubber material to be bent; a connector electrically connecting the main body and the band; and a coupler physically connecting the main body and the band. According to a configuration of the present invention, the present invention is possible in realizing a high-capacity and high-performance smart device.

Abstract: A wearable smart device of the present invention comprises: a main body on which a basic module is mounted; a band on which at least one auxiliary module is mounted, which is selectively attached and detached to the main body made of a polymer material or a rubber material to be bent; a connector electrically connecting the main body and the band; and a coupler physically connecting the main body and the band. According to a configuration of the present invention, the present invention is possible in realizing a high-capacity and high-performance smart device.

Abstract: The semiconductor package according to the present invention comprises: an integrated substrate; a bottom chip stack, which is mounted on the integrated substrate, has multiple memory semiconductor dies stacked chip-on-chip, and takes charge of a part of the whole memory capacity; at least one top chip stack, which is mounted on the bottom package, has multiple memory semiconductor dies mounted therein, and takes charge of the rest of the whole memory capacity; an integration wire for electrically connecting the bottom chip stack and the top chip stack(s); and an integration protection member for sealing the integration wire.

Abstract: A VoIP gateway system connected through an extension subscriber circuit of a private branch exchange is provided, which includes a switching unit connected to extension terminals of the extension subscriber circuit of the private branch exchange, the switching unit finding an idle extension line of extension lines of the extension subscriber circuits to perform automatic connection; a voice CODEC connected to the switching unit, to perform modulation and demodulation between a voice signal and a digital signal; a LAN connection part connected to the voice CODEC; and a controller connected with the switching unit, voice CODEC and LAN connection part, for providing control signals for outgoing- and incoming-call operations.