Abstract: Provided is a method for analyzing the content of D-lactic repeating units (D content) in polylactic acid that has a feature that the D content in polylactic acid can be quickly and accurately analyzed by using NMR data of polylactic acid and hypothetical polylactic acid without special chemical treatment for polylactic acid.

Abstract: A substrate treating apparatus to minimize the occurrence of turbulent flow in the edge direction of the substrate and semiconductor manufacturing equipment including the substrate treating apparatus are provided. The substrate treating apparatus includes an upper module including a first supply port providing supercritical fluid to a substrate treating space, a lower module coupled to the upper module and including a second supply port providing the supercritical fluid to the substrate treating space, a shielding plate disposed in the substrate treating space, a plate support coupled to the lower module and supporting the shielding plate, and a first substrate support coupled to the shielding plate and supporting the substrate. A fluid flow path between the lower module and the shielding plate includes a throat structure changing a cross-sectional size of the fluid flow path.

Abstract: A light emitting device includes a substrate; a pattern of a plurality of protrusions protruding from the substrate; a first semiconductor layer provided on the substrate; an active layer provided on the first semiconductor layer; and a second semiconductor layer provided on the active layer, in which each of the protrusions includes a first layer formed integrally with the substrate and protruding from an upper surface of the base substrate; and a second layer provided on the first layer and formed of a material different from that of the first layer.

Abstract: A light emitting device includes a substrate; a pattern of a plurality of protrusions protruding from the substrate; a first semiconductor layer provided on the substrate; an active layer provided on the first semiconductor layer; and a second semiconductor layer provided on the active layer, in which each of the protrusions includes a first layer formed integrally with the substrate and protruding from an upper surface of the base substrate; and a second layer provided on the first layer and formed of a material different from that of the first layer.

Abstract: Disclosed herein is a pouch-type secondary battery and a manufacturing method thereof including. The pouch-type secondary battery includes an electrode assembly; an electrode lead extending from an electrode tab of the electrode assembly; an upper pouch; and a lower pouch. The upper pouch and the lower pouch include a sealed area where the edges are sealed and an unsealed area. An average thickness of the sealed area of the upper pouch and an average thickness of the sealed area of the lower pouch are equal to each other, and the average thickness of the unsealed area of the upper pouch is smaller than the average thickness of the unsealed area of the lower pouch, so that even if the thickness of the lower pouch is reduced during the sealing process of heat-sealing, the sealed area of the upper and lower pouches are formed with little difference in thickness.

Abstract: A light emitting device includes a substrate; a pattern of a plurality of protrusions protruding from the substrate; a first semiconductor layer provided on the substrate; an active layer provided on the first semiconductor layer; and a second semiconductor layer provided on the active layer, in which each of the protrusions includes a first layer formed integrally with the substrate and protruding from an upper surface of the base substrate; and a second layer provided on the first layer and formed of a material different from that of the first layer.

Abstract: Provided is a method for analyzing the content of D-lactic repeating units (D content) in polylactic acid that has a feature that the D content in polylactic acid can be quickly and accurately analyzed by using NMR data of polylactic acid and hypothetical polylactic acid without special chemical treatment for polylactic acid.

Abstract: The present invention is provided with a secondary battery comprising: an electrode assembly to which an electrode lead is bonded; a pouch configured to accommodate the electrode assembly and provided with a sealing part; and a lead film configured to seal a portion between the sealing part and the electrode lead, wherein a pattern means configured to pattern the sealing part and the lead film so as to increase in bonding area between the sealing part and the lead film is provided on a bonding portion between the sealing part and the lead film. Therefore, bonding force and sealing force between the lead film and the sealing part may increase.

Abstract: A coil component includes: a body having first and second surfaces opposing each other; and a coil portion embedded within the body, wherein the coil portion includes first and second coil patterns, a first lead-out portion and a first dummy lead-out portion respectively extending from the first coil pattern, and respectively exposed to the first and second surfaces of the body, while being spaced apart from each other, and a second lead-out portion and a second dummy lead-out portion respectively extending from the second coil pattern, and respectively exposed to the first and second surfaces of the body, while being spaced apart from each other.

Abstract: A light emitting device includes a substrate; a pattern of a plurality of protrusions protruding from the substrate; a first semiconductor layer provided on the substrate; an active layer provided on the first semiconductor layer; and a second semiconductor layer provided on the active layer, in which each of the protrusions includes a first layer formed integrally with the substrate and protruding from an upper surface of the base substrate; and a second layer provided on the first layer and formed of a material different from that of the first layer.

Abstract: A semiconductor chip includes a substrate including: a main chip region; and a scribe lane surrounding the main chip region; a lower interlayer insulating layer disposed on the substrate in the scribe lane; a circuit structure disposed on the lower interlayer insulating layer in the scribe lane; and a pad structure disposed on the lower interlayer insulating layer. The circuit structure and the pad structure are disposed to be spaced apart from each other in a longitudinal direction of the scribe lane.

Abstract: A semiconductor chip including an alignment pattern is provided. The semiconductor chip includes a substrate associated with a main chip region of a semiconductor wafer and including a scribe lane. A lower interlayer insulating layer is disposed on the substrate, a low-K layer including dummy metal patterns is disposed on the lower interlayer insulating layer, an alignment pattern is disposed on the low-K layer, and a passivation layer covers the alignment pattern.

Abstract: A light emitting device includes a substrate; a pattern of a plurality of protrusions protruding from the substrate; a first semiconductor layer provided on the substrate; an active layer provided on the first semiconductor layer; and a second semiconductor layer provided on the active layer, in which each of the protrusions includes a first layer formed integrally with the substrate and protruding from an upper surface of the base substrate; and a second layer provided on the first layer and formed of a material different from that of the first layer.

Abstract: A semiconductor device is provided. The semiconductor device includes: a substrate which includes a semiconductor chip region and a scribe line region surrounding the semiconductor chip region; an insulating film arranged over the semiconductor chip region and the scribe line region on the substrate, and including a first surface, a second surface opposite to the first surface, a third surface connecting the first surface and the second surface, and a fourth surface opposite to the third surface and connecting the first surface and the second surface; and an opening portion formed on the second surface of the insulating film and the fourth surface of the insulating film to expose the substrate, wherein the opening portion is formed in the scribe line region, and the first surface of the insulating film and the third surface of the insulating film do not include an opening portion which expose the substrate.

Abstract: Provided is a method of fabricating a semiconductor device. The method includes forming an oxide film on a target layer, forming a first mask film on the oxide film, wherein the first mask film contains a semiconductor material and has a first thickness and a first etch selectivity with respect to the oxide film, forming a second mask film on the first mask film, wherein the second mask film contains a metal and has a second thickness smaller than the first thickness and a second etch selectivity larger than the first etch selectivity with respect to the oxide film, forming a second mask film pattern by patterning the second mask film, forming a first mask film pattern by patterning the first mask film, etching some portions of the oxide film by using the second mask film pattern as an etch mask film, and etching the rest of the oxide film by using the first mask film pattern as an etch mask film to form a hole, wherein the target layer is exposed via the hole.

Abstract: Disclosed herein is an in-ear earphone including a drum safety filter (DSF) path, the in-ear earphone including: an earcap; an acoustic structure; and an acoustic unit; wherein the acoustic structure and the acoustic unit include a DSF path configured to remove eardrum pressure during the use of the in-ear earphone by moving air across the front and rear sides of the in-ear earphone.

Abstract: A semiconductor chip including an alignment patter is provided. The semiconductor ship includes a substrate associated with a main chip region of a semiconductor wafer and including a scribe lane. A lower interlayer insulating layer is disposed on the substrate, a low-K layer including dummy metal patterns is disposed on the lower interlayer insulating layer, an alignment pattern is disposed on the low-K layer, and a passivation layer covers the alignment pattern.

Abstract: A semiconductor chip includes a substrate including: a main chip region; and a scribe lane surrounding the main chip region; a lower interlayer insulating layer disposed on the substrate in the scribe lane; a circuit structure disposed on the lower interlayer insulating layer in the scribe lane; and a pad structure disposed on the lower interlayer insulating layer. The circuit structure and the pad structure are disposed to be spaced apart from each other in a longitudinal direction of the scribe lane.

Abstract: A method for fabricating a semiconductor device includes forming an insulating layer on a substrate; forming a first mask pattern including silicon on the insulating layer and forming a second mask pattern including an oxide on the first mask pattern; forming a coating layer that includes carbon and which covers an upper surface of the insulating layer, a sidewall of the first mask pattern, and the second mask pattern; removing a portion of the coating layer and the second mask pattern; forming a metal layer on an upper surface of the first mask pattern and on a sidewall of the coating layer; exposing the upper surface of the insulating layer by removing the coating layer; and etching the insulating layer by using the first mask pattern and the metal layer as a mask.

Abstract: A semiconductor device is provided. The semiconductor device includes: a substrate which includes a semiconductor chip region and a scribe line region surrounding the semiconductor chip region; an insulating film arranged over the semiconductor chip region and the scribe line region on the substrate, and including a first surface, a second surface opposite to the first surface, a third surface connecting the first surface and the second surface, and a fourth surface opposite to the third surface and connecting the first surface and the second surface; and an opening portion formed on the second surface of the insulating film and the fourth surface of the insulating film to expose the substrate, wherein the opening portion is formed in the scribe line region, and the first surface of the insulating film and the third surface of the insulating film do not include an opening portion which expose the substrate.