Abstract: The pixel circuit and a display apparatus including the same are disclosed. A supply frequency of a fourth scan signal which is supplied to the pixel may be controlled, in response to a frame frequency (or a supply frequency of a second scan signal) of the display apparatus. The pixel circuit and the display apparatus including the same may be driven at various frame frequencies and suppress the mura phenomenon which may be visible to the user.

Abstract: A display device includes a display panel including a plurality of pixels connected to a data line and a gate line, a data driver configured to drive by dividing an active period to which a data voltage is applied to the data line and a blank period to which the data voltage is not applied, a gate driver to apply a scan signal to the gate line, and a controller to control the plurality of pixels to be driven in one of a plurality of bands having different highest target luminance. A parking voltage is applied to the data line during the blank period, and the parking voltage applied to the data line in at least one of the plurality of bands has a voltage level different from a voltage level of the parking voltage applied to the data line in the other band of the plurality of bands.

Abstract: A gate driver includes a plurality of stages for sequentially supplying gate signals to a plurality of gate lines, each stage including an input circuit for receiving an (n?1)th gate signal carried through an (n?1)th gate line and a gate clock signal, and applying a first voltage and a second voltage having a polarity opposite to that of the first voltage to a Q node and a QB node, respectively; an output circuit for generating an n-th gate signal by outputting a low voltage corresponding to the first voltage or a high voltage corresponding to the second voltage, and outputting the generated n-th gate signal to an n-th gate line; and a stabilizing capacitor disposed between the n-th gate line and a high voltage source for supplying a high voltage.

Abstract: The present disclosure relates to a pixel circuit and a display apparatus comprising the pixel circuit. A pixel circuit according to an exemplary embodiment of the present disclosure may include a driving transistor including a gate electrode, a first electrode, and a second electrode, a first transistor connected to the gate electrode and the second electrode, a second transistor connected to the first transistor and the gate electrode, a third transistor connected to the second electrode and the first transistor, a first capacitor connected to the gate electrode, the first transistor, the second transistor, and a high potential power line, a second capacitor connected to the high potential power line, the first capacitor, and the second transistor, and a light emitting diode connected to the third transistor and the low potential power line.

Abstract: A display device includes a display panel including a light emitting element, a driving transistor for providing a driving current to the light emitting element using a driving voltage, and a plurality of switching transistors for controlling the operation of the driving transistor; a gate driving circuit for supplying a plurality of scan signals to the display panel through a plurality of gate lines; an emission driving circuit for supplying a plurality of emission signals to the display panel through a plurality of emission signal lines; a data driving circuit for supplying a data voltage to the display panel; and a timing controller for controlling a leakage suppression voltage to be supplied to the driving transistor in a leakage suppression period after a bias voltage is supplied to the driving transistor in a low speed mode in which the display panel is driven at a lower driving frequency.

Abstract: A gate driver includes a plurality of stages for sequentially supplying gate signals to a plurality of gate lines, each stage including an input circuit for receiving an (n?1)th gate signal carried through an (n?1)th gate line and a gate clock signal, and applying a first voltage and a second voltage having a polarity opposite to that of the first voltage to a Q node and a QB node, respectively; an output circuit for generating an n-th gate signal by outputting a low voltage corresponding to the first voltage or a high voltage corresponding to the second voltage, and outputting the generated n-th gate signal to an n-th gate line; and a stabilizing capacitor disposed between the n-th gate line and a high voltage source for supplying a high voltage.

Abstract: A display device includes a display panel including a light emitting element, a driving transistor for providing a driving current to the light emitting element using a driving voltage, and a plurality of switching transistors for controlling the operation of the driving transistor; a gate driving circuit for supplying a plurality of scan signals to the display panel through a plurality of gate lines; an emission driving circuit for supplying a plurality of emission signals to the display panel through a plurality of emission signal lines; a data driving circuit for supplying a data voltage to the display panel; and a timing controller for controlling a leakage suppression voltage to be supplied to the driving transistor in a leakage suppression period after a bias voltage is supplied to the driving transistor in a low speed mode in which the display panel is driven at a lower driving frequency.

Abstract: A display device includes a display panel including a plurality of pixels connected to a data line and a gate line, a data driver configured to drive by dividing an active period to which a data voltage is applied to the data line and a blank period to which the data voltage is not applied, a gate driver to apply a scan signal to the gate line, and a controller to control the plurality of pixels to be driven in one of a plurality of bands having different highest target luminance. A parking voltage is applied to the data line during the blank period, and the parking voltage applied to the data line in at least one of the plurality of bands has a voltage level different from a voltage level of the parking voltage applied to the data line in the other band of the plurality of bands.