Patents by Inventor Jun Hyung LIM

Jun Hyung LIM has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12389681
    Abstract: A display device includes a first semiconductor layer, a first conductive layer disposed on the first semiconductor layer and including a first capacitor electrode at least partially overlapping the first semiconductor layer in a plan view to constitute a first transistor, a second capacitor electrode disposed on the first conductive layer and overlapping the first capacitor electrode in a plan view to constitute a first capacitor, a second semiconductor layer disposed on the second capacitor electrode and including a third capacitor electrode overlapping the second capacitor electrode in a plan view to constitute a second capacitor, a second conductive layer disposed on the second semiconductor layer and at least partially overlapping the second semiconductor layer, and a third conductive layer disposed over the second conductive layer to implement a high-resolution image by overlapping the first capacitor electrode, the second capacitor electrode, and the third capacitor electrode.
    Type: Grant
    Filed: June 16, 2022
    Date of Patent: August 12, 2025
    Assignee: Samsung Display Co., Ltd.
    Inventors: Myeongho Kim, Jaybum Kim, Kyoung Seok Son, Seungjun Lee, Seunghun Lee, Jun Hyung Lim
  • Patent number: 12369456
    Abstract: A display device includes a first lower electrode disposed on a base substrate, a first upper electrode disposed on the first lower electrode, overlapping the first lower electrode in a plan view, including a silicon semiconductor, and constituting a first capacitor together with the first lower electrode, a second lower electrode disposed on the first upper electrode, and a second upper electrode disposed on the second lower electrode, overlapping the second lower electrode in a plan view, including an oxide semiconductor, and constituting a second capacitor together with the second lower electrode.
    Type: Grant
    Filed: April 12, 2024
    Date of Patent: July 22, 2025
    Assignee: Samsung Display Co., Ltd.
    Inventors: Myeongho Kim, Yeonhong Kim, Jaybum Kim, Kyoung Seok Son, Sunhee Lee, Seungjun Lee, Seunghun Lee, Jun Hyung Lim
  • Publication number: 20250228072
    Abstract: A display panel includes: a silicon substrate; a first active pattern including a single-crystalline semiconductor layer on the silicon substrate; a first gate insulating layer covering the first active pattern; a first gate electrode on the first gate insulating layer, and including at least a portion overlapping with the first active pattern; a first interlayer insulating layer on the first gate electrode; a second active pattern on the first interlayer insulating layer, and including a metal oxide semiconductor; a second gate insulating layer covering the second active pattern; a second gate electrode on the second gate insulating layer, and including at least a portion overlapping with the second active pattern; a second interlayer insulating layer covering the second gate electrode; and a source/drain electrode layer on the second interlayer insulating layer, and connected to the first and second active patterns.
    Type: Application
    Filed: July 18, 2024
    Publication date: July 10, 2025
    Inventors: Keun Woo KIM, Doo Na KIM, Sang Sub KIM, Bum Mo SUNG, Jun Hyung LIM, Sang Gun CHOI
  • Patent number: 12349546
    Abstract: A display device includes a display area and a functional area defining a through-portion therein. At least a portion of the functional area is surrounded by the display area. The display device includes an insulation layer disposed on a base substrate and defining a disconnection portion in the functional area, a pixel array disposed on the base substrate in the display area, and a mask pattern including a metal oxide and extending along the disconnection portion in a plan view.
    Type: Grant
    Filed: June 25, 2021
    Date of Patent: July 1, 2025
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Eun Hyun Kim, Jaybum Kim, Kyoung Seok Son, Sunhee Lee, Jun Hyung Lim
  • Patent number: 12324322
    Abstract: A display device comprises a substrate; a driving transistor including a first active layer and a switching transistor including a second active layer, the first active layer and the second active layer being disposed on the substrate; a first gate insulating layer disposed on the first active layer of the driving transistor and the second active layer of the switching transistor; first and second gate electrodes disposed on the first gate insulating layer to overlap the first active layer of the driving transistor and the second active layer of the switching transistor, respectively; a first interlayer insulating layer disposed on the first gate electrode and the second gate electrode; and a second interlayer insulating layer disposed on the first interlayer insulating layer to overlap the first active layer without overlapping the second active layer in a plan view.
    Type: Grant
    Filed: February 7, 2024
    Date of Patent: June 3, 2025
    Assignees: Samsung Display Co., Ltd., Industry-University Cooperation Foundation Hanyang University ERICA Campus
    Inventors: Sang Woo Sohn, Saeroonter Oh, Joon Seok Park, Young Joon Choi, Su Hyun Kim, Jun Hyung Lim
  • Publication number: 20250151524
    Abstract: A display device includes a first transistor including a first transistor including a light blocking pattern on a substrate, an active pattern on the light blocking pattern, and a gate electrode on the active pattern, a second transistor configured to provide a data voltage to the first transistor in response to a gate signal, and a storage capacitor electrically connected to the gate electrode and the light blocking pattern, and including a first conductive pattern in a same layer as the light blocking pattern, a second conductive pattern on the first conductive pattern and overlapping the first conductive pattern, a third conductive pattern in a same layer as the gate electrode, overlapping the second conductive pattern, and electrically connected to the first conductive pattern, and a fourth conductive pattern on the third conductive pattern, overlapping the third conductive pattern, and electrically connected to the second conductive pattern.
    Type: Application
    Filed: January 13, 2025
    Publication date: May 8, 2025
    Inventors: HYUNGJUN KIM, SOYOUNG KOO, EOK SU KIM, YUNYONG NAM, JUN HYUNG LIM, KYUNGJIN JEON
  • Patent number: 12289972
    Abstract: Provided is display device comprising a substrate; a first semiconductor layer disposed on the substrate and having a plurality of transistors; a second semiconductor layer disposed on the first semiconductor layer and having a plurality of transistors; a first data conductive layer disposed on the second semiconductor layer; a first metal layer disposed on the first data conductive layer; and a second metal layer disposed on the first metal layer, wherein the first metal layer includes a first storage electrode and a first input electrode, the second metal layer includes a second storage electrode and a second input electrode, the first storage electrode and the second storage electrode configure a storage capacitor, and the first input electrode and the second input electrode configure an input capacitor.
    Type: Grant
    Filed: June 9, 2022
    Date of Patent: April 29, 2025
    Assignee: Samsung Display Co., Ltd.
    Inventors: Myeong Ho Kim, Jay Bum Kim, Kyoung Seok Son, Seung Jun Lee, Seung Hun Lee, Jun Hyung Lim
  • Publication number: 20250126985
    Abstract: A display device includes a bottom electrode on a substrate, and including a first electrode portion and second electrode portions on sides of the first electrode portion, a first insulating layer on the substrate and the bottom electrode, an active layer on the first insulating layer, and including a channel region on the first electrode portion and a source and a drain region on the second electrode portions, a gate insulating layer on the channel region, and exposing the source and the drain region, and a gate electrode on the gate insulating layer, and overlapping the channel region. The first insulating layer and the active layer includes a valley in a corresponding area between the first electrode portion and the second electrode portions. The gate insulating layer includes an end positioned on the valley of the active layer and has a length greater than the gate electrode.
    Type: Application
    Filed: May 30, 2024
    Publication date: April 17, 2025
    Applicant: Samsung Display Co., LTD.
    Inventors: Chul Won PARK, Dong Wuuk SEO, Jun Hyung LIM, Hyun Jun JEONG, Seong Jun CHO
  • Patent number: 12274108
    Abstract: A thin film transistor includes a gate electrode, an insulating layer disposed on the gate electrode, and an active layer disposed on the insulating layer, where the active layer includes a perovskite compound represented by the following Formula: AB(1-u)C(u)[X(1-v)Y(v)]3, where A is a monovalent organic cation, a monovalent inorganic cation, or any combination thereof, B is Sn2+, C is a divalent cation or trivalent cation, X is a monovalent anion, Y is a monovalent anion different from X, u is a real number greater than 0 and less than 1, and v is a real number greater than 0 and less than 1.
    Type: Grant
    Filed: November 30, 2021
    Date of Patent: April 8, 2025
    Assignees: SAMSUNG DISPLAY CO., LTD, POSTECH RESEARCH AND BUSINESS DEVELOPMENT FOUNDATION
    Inventors: Jun Hyung Lim, Yong-Young Noh, Soyoung Koo, Hyungjun Kim, Huihui Zhu
  • Patent number: 12225771
    Abstract: A display device includes a first transistor including a first transistor including a light blocking pattern on a substrate, an active pattern on the light blocking pattern, and a gate electrode on the active pattern, a second transistor configured to provide a data voltage to the first transistor in response to a gate signal, and a storage capacitor electrically connected to the gate electrode and the light blocking pattern, and including a first conductive pattern in a same layer as the light blocking pattern, a second conductive pattern on the first conductive pattern and overlapping the first conductive pattern, a third conductive pattern in a same layer as the gate electrode, overlapping the second conductive pattern, and electrically connected to the first conductive pattern, and a fourth conductive pattern on the third conductive pattern, overlapping the third conductive pattern, and electrically connected to the second conductive pattern.
    Type: Grant
    Filed: May 12, 2021
    Date of Patent: February 11, 2025
    Assignee: Samsung Display Co., Ltd.
    Inventors: Hyungjun Kim, Soyoung Koo, Eok Su Kim, Yunyong Nam, Jun Hyung Lim, Kyungjin Jeon
  • Patent number: 12218151
    Abstract: A display device according to an embodiment of the present disclosure includes: a substrate; a first conductive layer on the substrate; a first insulating layer on the first conductive layer; an active pattern on the first insulating layer and including a semiconductor material; a second insulating layer on the active pattern; and a second conductive layer on the second insulating layer, wherein the first insulating layer has a first opening exposing the first conductive layer, the second insulating layer has a second opening exposing the first conductive layer, a breadth of the first opening is different than a breadth of the second opening, and a side surface of the first opening and a side surface of the second opening are formed to a top surface of the first conductive layer.
    Type: Grant
    Filed: October 3, 2023
    Date of Patent: February 4, 2025
    Assignee: Samsung Display Co., Ltd.
    Inventors: So Young Koo, Jay Bum Kim, Kyung Jin Jeon, Eok Su Kim, Jun Hyung Lim
  • Publication number: 20240413174
    Abstract: According to some embodiments of the present disclosure, a display device includes an active pattern including a metal oxide, a gate electrode overlapping the active pattern, a first capacitor electrode spaced apart from the active pattern and including a conductive oxide, and a second capacitor electrode on the first capacitor electrode.
    Type: Application
    Filed: August 16, 2024
    Publication date: December 12, 2024
    Inventors: Kyung Jin JEON, Eok Su KIM, Joon Seok PARK, So Young KOO, Tae Sang KIM, Jun Hyung LIM
  • Patent number: 12125836
    Abstract: A display device includes a first conductive layer disposed on a substrate, a passivation layer disposed on the first conductive layer, a second conductive layer disposed on the passivation layer, a via layer disposed on the second conductive layer, a third conductive layer disposed on the via layer, the third conductive layer including a first electrode, a second electrode, a connection pattern, the first electrode, the second electrode, and the connection pattern being spaced apart from each other, and a light emitting element, a first end and a second end of the light emitting element being disposed on the first electrode and the second electrode, respectively, wherein the connection pattern electrically connects the first conductive layer and the second conductive layer through a first contact hole penetrating the via layer and the passivation layer.
    Type: Grant
    Filed: December 26, 2023
    Date of Patent: October 22, 2024
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Kyung Jin Jeon, So Young Koo, Eok Su Kim, Hyung Jun Kim, Yun Yong Nam, Jun Hyung Lim
  • Publication number: 20240349547
    Abstract: A display device is disclosed that includes a base substrate, an organic light emitting element disposed on the base substrate, an insulating layer disposed on the base substrate and containing silicon oxide, and a thin film transistor disposed on the base substrate and electrically connected to the organic light emitting element, wherein the thin film transistor includes a semiconductor pattern disposed on the base substrate and including a channel area in contact with the insulating layer, and a gate electrode overlapping the channel area on a plane, wherein the semiconductor pattern contains indium gallium zinc tin oxide.
    Type: Application
    Filed: March 28, 2024
    Publication date: October 17, 2024
    Inventors: EUN HYUN KIM, Gwang Bok KIM, JUN HYUNG LIM, Jae Kyeong JEONG
  • Publication number: 20240341132
    Abstract: A display device includes a substrate, a corrosion prevention layer on the substrate and including an inorganic material, a first conductive layer on the corrosion prevention layer and including aluminum or an aluminum alloy, a first insulating film on the first conductive layer, a semiconductor layer on the first insulating film and including a channel region of a transistor, a second insulating film on the semiconductor layer, and a second conductive layer on the second insulating film and including a barrier layer, which includes titanium, and a main conductive layer, which includes aluminum or an aluminum alloy, wherein the semiconductor layer includes an oxide semiconductor, and the barrier layer is between the semiconductor layer and the main conductive layer and overlaps the channel region of the transistor.
    Type: Application
    Filed: June 17, 2024
    Publication date: October 10, 2024
    Inventors: Yeon Hong KIM, Eun Hye KO, Eun Hyun KIM, Kyoung Won LEE, Sun Hee LEE, Jun Hyung LIM
  • Patent number: 12107114
    Abstract: A display device includes first banks on a substrate and spaced apart from each other, a first electrode and a second electrode on the first banks and spaced apart from each other, a first insulating layer on the first electrode and the second electrode, and light emitting elements on the first insulating layer and each having ends on the first electrode and the second electrode. Each of the first banks includes a first pattern portion including concave portions and convex portions. The first pattern portions of the first banks are disposed on side surfaces of the first banks. The side surfaces are spaced apart and face each other. Each of the first electrode and the second electrode includes a second pattern portion on the first pattern portion and having a pattern shape corresponding to the first pattern portion on a surface thereof.
    Type: Grant
    Filed: September 10, 2021
    Date of Patent: October 1, 2024
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Hyung Jun Kim, So Young Koo, Eok Su Kim, Yun Yong Nam, Jun Hyung Lim, Kyung Jin Jeon
  • Patent number: 12080826
    Abstract: A display device may include a first gate electrode on a substrate, a buffer layer on the first gate electrode, a first active pattern on the buffer layer, overlapping the first gate electrode, and including an oxide semiconductor, a source pattern and a drain pattern respectively on ends of the first active pattern, an insulation layer overlapping the source pattern and the drain pattern on the buffer layer, an oxygen supply pattern on the insulation layer, overlapping the first active pattern, and supplying oxygen to the first active pattern, a second active pattern on the insulation layer and spaced apart from the oxygen supply pattern, the second active pattern including a channel region, and a source region and a drain region, an insulation pattern on the channel region of the second active pattern, and a second gate electrode on the insulation pattern.
    Type: Grant
    Filed: February 9, 2021
    Date of Patent: September 3, 2024
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Joon Seok Park, Myoung Hwa Kim, Tae Sang Kim, Yeon Keon Moon, Geun Chul Park, Jun Hyung Lim, Hye Lim Choi
  • Patent number: 12075665
    Abstract: A display device according to an embodiment includes: a first metal layer disposed on a substrate; a first insulating layer disposed on the first metal layer; a first transistor disposed on the first insulating layer and including a semiconductor layer; and a light-emitting device electrically connected to the first transistor, wherein the first metal layer includes a first portion with a first thickness and a second portion with a second thickness, the second thickness is greater than the first thickness, and the semiconductor layer is electrically connected to the first metal layer.
    Type: Grant
    Filed: June 10, 2021
    Date of Patent: August 27, 2024
    Assignee: Samsung Display Co., Ltd.
    Inventors: Kyoung Won Lee, Eun Hye Ko, Yeon Hong Kim, Eun Hyun Kim, Sun Hee Lee, Jun Hyung Lim
  • Patent number: 12068336
    Abstract: A display device and a method of manufacturing a display device are provided. The display device includes a first conductive layer on a substrate, a passivation layer disposed on the first conductive layer and exposing at least a part of the first conductive layer, a second conductive layer disposed on the passivation layer and covering an upper surface of the passivation layer, a via layer on the second conductive layer, a third conductive layer including a first electrode, a second electrode, and a connection pattern, and spaced apart from each other on the via layer, and a light emitting element having ends that are disposed on the first electrode and the second electrode, respectively. The connection pattern electrically connects the first conductive layer and the second conductive layer through a first contact hole penetrating the via layer.
    Type: Grant
    Filed: September 8, 2021
    Date of Patent: August 20, 2024
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Kyung Jin Jeon, So Young Koo, Eok Su Kim, Hyung Jun Kim, Yun Yong Nam, Jun Hyung Lim
  • Patent number: 12069918
    Abstract: A display device includes a substrate, a first conductive layer on the substrate and including a lower light blocking pattern and a first signal line, a buffer layer on the first conductive layer, a semiconductor layer on the buffer layer and including a first semiconductor pattern and a second semiconductor pattern separated from the first semiconductor pattern, an insulating layer on the semiconductor layer and including an insulating layer pattern, a second conductive layer on the insulating layer and including a second signal line, a planarization layer on the second conductive layer, and a third conductive layer on the planarization layer and including an anode electrode. The first semiconductor pattern is electrically connected to the lower light blocking pattern by the anode electrode, and at least a portion of the second semiconductor pattern is isolated from and overlaps each of the first signal line and the second signal line.
    Type: Grant
    Filed: August 4, 2023
    Date of Patent: August 20, 2024
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Kyung Jin Jeon, So Young Koo, Eok Su Kim, Hyung Jun Kim, Jun Hyung Lim