Patents by Inventor Junichi CHISAKA
Junichi CHISAKA has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Publication number: 20230291396Abstract: According to one embodiment, a semiconductor device includes a first transistor, a first circuit, a second circuit, and a third circuit. The first transistor has one end connected to a power supply voltage terminal, the other end connected to a first node, and a gate connected to a first output terminal. The first circuit is configured to control a voltage of the first node based on a voltage of a ground voltage terminal. The second circuit is configured to control a voltage of the first output terminal based on the voltage of the ground voltage terminal and a voltage of an input terminal. The third circuit is configured to control switching between connection and disconnection between the ground voltage terminal and the first circuit.Type: ApplicationFiled: September 7, 2022Publication date: September 14, 2023Inventor: Junichi CHISAKA
-
Patent number: 11395386Abstract: According to one embodiment, a semiconductor device includes a first current mirror having an output end coupled to a first node, a second current mirror having an output end coupled to a second node, a third current mirror having an input end coupled to the second node and an output end coupled to the first node, a fourth current mirror having an input end coupled to the first node, and an output driver that generate a current based on the fourth current mirror. A current flows to the first current source changes at a first ratio with respect to temperature, a current flows to the second current source changes at a second ratio having a negative correlation with respect to temperature, and an absolute value of the first ratio is smaller than that of the second ratio.Type: GrantFiled: August 21, 2020Date of Patent: July 19, 2022Assignees: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATIONInventor: Junichi Chisaka
-
Publication number: 20210243860Abstract: According to one embodiment, a semiconductor device includes a first current mirror having an output end coupled to a first node, a second current mirror having an output end coupled to a second node, a third current mirror having an input end coupled to the second node and an output end coupled to the first node, a fourth current mirror having an input end coupled to the first node, and an output driver that generate a current based on the fourth current mirror. A current flows to the first current source changes at a first ratio with respect to temperature, a current flows to the second current source changes at a second ratio having a negative correlation with respect to temperature, and an absolute value of the first ratio is smaller than that of the second ratio.Type: ApplicationFiled: August 21, 2020Publication date: August 5, 2021Inventor: Junichi Chisaka
-
Publication number: 20200244260Abstract: According to one embodiment, a semiconductor device includes: a boost circuit configured to apply a first voltage to a gate terminal; a first switching element, a first resistor, and a second resistor that are coupled in parallel between the gate terminal and a source terminal; a second switching element coupled in series with the second resistor between the gate terminal and the source terminal; a switching element control circuit configured to switch, in response to a change of a voltage from the first voltage applied from the boost circuit to the gate terminal to being indeterminate, the first switching element to on state after switching the second switching element to on state. A resistance value of the second resistor is smaller than a resistance value of the first resistor.Type: ApplicationFiled: July 19, 2019Publication date: July 30, 2020Applicants: KABUSHIKI KAISHA TOSHIBA, Toshiba Electronic Devices & Storage CorporationInventor: Junichi CHISAKA
-
Patent number: 10720922Abstract: According to one embodiment, a semiconductor device includes: a boost circuit configured to apply a first voltage to a gate terminal; a first switching element, a first resistor, and a second resistor that are coupled in parallel between the gate terminal and a source terminal; a second switching element coupled in series with the second resistor between the gate terminal and the source terminal; a switching element control circuit configured to switch, in response to a change of a voltage from the first voltage applied from the boost circuit to the gate terminal to being indeterminate, the first switching element to on state after switching the second switching element to on state. A resistance value of the second resistor is smaller than a resistance value of the first resistor.Type: GrantFiled: July 19, 2019Date of Patent: July 21, 2020Assignees: KABUSHIKI KAISHA TOSHIBA, Toshiba Electronic Devices & Storage CorporationInventor: Junichi Chisaka
-
Patent number: 10205446Abstract: A semiconductor device includes a gate terminal, a ground terminal, a power-supply terminal, and a source terminal. The semiconductor device includes a first switch element having a gate and a source, the first switch element connected between the gate terminal and the source terminal, a second switch element connected between one of the gate of the first switch element and the source terminal or between the gate of the first switch element and the ground terminal and configured to switch the first switch element between turned-on and turned-off states, and a capacitor having one terminal thereof connected to the power-supply terminal and the ground terminal and another terminal thereof connected to the gate of the first switch element. Based on the potential state of the ground terminal and the state of the second switch element, the capacitor boosts the voltage of the gate of the first switch element.Type: GrantFiled: August 30, 2016Date of Patent: February 12, 2019Assignee: Kabushiki Kaisha ToshibaInventor: Junichi Chisaka
-
Publication number: 20180278159Abstract: According to embodiments, a semiconductor device includes a first switching element in which a first reference voltage is input to a gate; a second switching element in which a first voltage is input to a gate; a third switching element to which the first switching element is in Darlington connection; a fourth switching element to which the second switching element is in Darlington connection; a first current mirror circuit to regulate currents flowing in the third and fourth switching elements; a fifth switching element switched between ON and OFF states based on a difference between the first reference and the first voltages; a constant current circuit; a second current mirror circuit; and a voltage setting resistance element between a source of the first switching element and a gate of the third switching element or between a source of the second switching element and a gate of the fourth switching element.Type: ApplicationFiled: September 11, 2017Publication date: September 27, 2018Inventors: Junichi Chisaka, Kei Kasai
-
Patent number: 10084374Abstract: According to embodiments, a semiconductor device includes a first switching element in which a first reference voltage is input to a gate; a second switching element in which a first voltage is input to a gate; a third switching element to which the first switching element is in Darlington connection; a fourth switching element to which the second switching element is in Darlington connection; a first current mirror circuit to regulate currents flowing in the third and fourth switching elements; a fifth switching element switched between ON and OFF states based on a difference between the first reference and the first voltages; a constant current circuit; a second current mirror circuit; and a voltage setting resistance element between a source of the first switching element and a gate of the third switching element or between a source of the second switching element and a gate of the fourth switching element.Type: GrantFiled: September 11, 2017Date of Patent: September 25, 2018Assignee: Kabushiki Kaisha ToshibaInventors: Junichi Chisaka, Kei Kasai
-
Publication number: 20170272069Abstract: A semiconductor device includes a gate terminal, a ground terminal, a power-supply terminal, and a source terminal. The semiconductor device includes a first switch element having a gate and a source, the first switch element connected between the gate terminal and the source terminal, a second switch element connected between one of the gate of the first switch element and the source terminal or between the gate of the first switch element and the ground terminal and configured to switch the first switch element between turned-on and turned-off states, and a capacitor having one terminal thereof connected to the power-supply terminal and the ground terminal and another terminal thereof connected to the gate of the first switch element. Based on the potential state of the ground terminal and the state of the second switch element, the capacitor boosts the voltage of the gate of the first switch element.Type: ApplicationFiled: August 30, 2016Publication date: September 21, 2017Inventor: Junichi CHISAKA