Patents by Inventor Junichi Higuchi
Junichi Higuchi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20120263182Abstract: Any packet loss is detected very quickly by means of only a series of sequence number in a multi-path environment where a transmitter and a receiver are connected to each other by way of a plurality of networks when no inversion of sequence arises in any of the networks. A communication apparatus includes a plurality of sequence buffers arranged at each network to accumulate packets until a sequence acknowledgement and an absence detecting section adapted to determine the occurrence of an absence of a packet when one or more packets are accumulated in all the sequence buffers. With this arrangement, the absence detecting section of the receiver monitors the packets staying in the sequence guaranteeing buffer arranged in each of the network, paying attention to the characteristic that packets are stored in the sequence buffers of all the networks when a packet loss takes place.Type: ApplicationFiled: June 25, 2012Publication date: October 18, 2012Applicant: NEC CORPORATIONInventors: Nobuyuki Enomoto, Hideyuki Shimonishi, Junichi Higuchi, Youichi Hidaka, Jun Suzuki, Takashi Yoshikawa
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Publication number: 20120246300Abstract: An analyzing apparatus including includes a memory and a processor that executes a procedure, the procedure including controlling the memory to store logs of communication between a first apparatus and a second apparatus, and logs of communication between the second apparatus and a third apparatus, and extracting logs indicating a pair of a first request and a first response corresponding to the first request, communicated between the second apparatus and the third apparatus within a time range from transmission of a second request, transmitted from the first apparatus to the second apparatus, to transmission of a second response corresponding to the second request, transmitted from the second apparatus to the first apparatus, from among the logs stored in the memory.Type: ApplicationFiled: February 23, 2012Publication date: September 27, 2012Applicant: FUJITSU LIMITEDInventors: Atsushi KUBOTA, Ken Yokoyama, Hirokazu Iwakura, Junichi Higuchi
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Publication number: 20120244031Abstract: The present invention provides a duplex stainless steel having excellent resistance to alkalis and particularly corrosion resistance against high-temperature concentrated alkali solutions and excellent weldability. The duplex stainless steel has a chemical composition comprising, in mass %, C: at most 0.03%, Si: at most 0.5%, Mn: at most 2.0%, P: at most 0.04%, S: at most 0.003%, Cr: at least 25.0% to less than 28.0%, Ni: at least 6.0% to at most 10.0%, Mo: at least 0.2% to at most 3.5%, N: less than 0.5%, W: at most 3.0%, and a remainder of Fe and impurities.Type: ApplicationFiled: May 1, 2012Publication date: September 27, 2012Applicant: SUMITOMO METAL INDUSTRIES, LTD.Inventors: Hideya KAMINAKA, Junichi Higuchi, Yoshiaki Yamade, Shuuji Yoshida, Junko Imamura
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Patent number: 8233483Abstract: Any packet loss is detected very quickly by means of only a series of sequence number in a multi-path environment where a transmitter and a receiver are connected to each other by way of a plurality of networks when no inversion of sequence arises in any of the networks. A communication apparatus includes a plurality of sequence buffers arranged at each network to accumulate packets until a sequence acknowledgement and an absence detecting section adapted to determine the occurrence of an absence of a packet when one or more packets are accumulated in all the sequence buffers. With this arrangement, the absence detecting section of the receiver monitors the packets staying in the sequence guaranteeing buffer arranged in each of the network, paying attention to the characteristic that packets are stored in the sequence buffers of all the networks when a packet loss takes place.Type: GrantFiled: August 28, 2008Date of Patent: July 31, 2012Assignee: NEC CorporationInventors: Nobuyuki Enomoto, Hideyuki Shimonishi, Junichi Higuchi, Youichi Hidaka, Jun Suzuki, Takashi Yoshikawa
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Patent number: 8200880Abstract: An I/O equipment sharing system includes CPUs, a plurality of route complexes coupled to the CPUs, upstream PCI Express-bridges coupled to the route complexes, downstream PCI Express-bridges coupled to the upstream PCI Express-bridges through a network, and I/O equipment coupled to the downstream PCI Express-bridges. In the above configuration, the I/O equipment are shared between the CPUs using the identifiers of the network (for example, Ethernet VLAN IDs), the identifiers are set so that they do not overlap between the respective CPUs and necessary I/O equipment is set to a set identifier. Further, an identifier is set to a plurality of the same I/O equipment required by the respective CPUs.Type: GrantFiled: September 19, 2007Date of Patent: June 12, 2012Assignee: NEC CorporationInventors: Junichi Higuchi, Youichi Hidaka, Jun Suzuki, Atsushi Iwata
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Publication number: 20120110233Abstract: Fault tolerance is improved, a functional limitation at the time of start-up of an I/O system is avoided, and a start-up time is shortened. A downstream PCI Express bridge sets a PCI Express device connected to the downstream PCI Express bridge itself, among a plurality of single root-compatible PCI Express devices shared by a plurality of root complexes connected to a plurality of upstream PCI Express bridges that exchange data with the downstream PC Express bridge itself through a network, controls and monitors a state of a physical link with the PCI Express device connected to the downstream PCI Express bridge itself, and performs monitoring and notification of an error of the PCI Express device connected to the downstream PCI Express bridge itself.Type: ApplicationFiled: June 11, 2010Publication date: May 3, 2012Inventors: Junichi Higuchi, Youichi Hidaka, Jun Suzuki, Takashi Yoshikawa
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Patent number: 8114355Abstract: A metal tube in the present invention is a metal tube for pyrolysis reaction with superior characteristics of both the heat exchange and the pyrolysis reaction, which is suitable for use in a process in which hydrocarbons are pyrolytically decomposed. The tube is a metal tube for pyrolysis reaction consisting of 3 or 4 spiral ribs 1 provided on an inner surface which are inclined at 20 to 35 degrees to an axial direction of the metal tube, and characterized in that h/Di of 0.1 to 0.2 and h/w of 0.25 to 1.0 when a height of the rib 1 is defined as “h”, a width of the rib 1 at its bottom part is defined as “w” and an inner diameter of the tube at the bottom part is defined as “Di” in cross section of the spiral rib 1.Type: GrantFiled: December 30, 2008Date of Patent: February 14, 2012Assignee: Sumitomo Metal Industries, Ltd.Inventors: Junichi Higuchi, Kenji Hamaogi
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Publication number: 20120016949Abstract: A distributed processing system which distributes a load of a request from a client without being restricted by a processing status and processing performance of transfer processing means is provided: A distributed processing system includes: processing means for processing a request from request means and generating a reply; a switch connected to the processing means; memory means connected to the switch; and an interface, connected to a network, the request means being connected to, and to the switch, for transferring the request from the request means to the memory means and for transferring the reply to the request means, wherein the memory means comprises: first control means for determining whether State management is required for the transferred request; first storage means for storing a request that requires the State management; and second storage means for storing a request that does not require the State management, the first control means eliminates the request stored in the first or the second stType: ApplicationFiled: March 15, 2010Publication date: January 19, 2012Inventors: Junichi Higuchi, Youichi Hidaka, Takashi Yoshikawa
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Patent number: 8040821Abstract: A switching device includes an input stage switch group 1-1 including a plurality of input lines, an output stage switch group 1-3 including a plurality of output lines, an intermediate stage switch group 1-2 arranged between the input stage switch group and the output stage switch group, and a scheduler 1-22 deciding a signal path of each of intermediate stage switches 1-21 in the intermediate stage switch group based on information input to the respective input lines. The intermediate stage switch group is divided into a plurality of groups, a plurality of the schedulers is arranged in a distributed fashion to correspond to the plurality of groups, respectively and the schedulers operate independently of one another.Type: GrantFiled: June 2, 2006Date of Patent: October 18, 2011Assignee: NEC CorporationInventors: Junichi Higuchi, Youichi Hidaka, Mikiharu Yamashita, Yukihiro Hara
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Publication number: 20110226822Abstract: A baby sling includes an infant holding part 10 that holds an infant in which the infant holding part 10 has a maximum width W that corresponds to a central part in a longitudinal direction of the baby sling and a gradually decrease in width between both sides in the longitudinal direction of the baby sling, wherein both sides in the longitudinal direction of the baby sling consists of outer parts 11 that are formed of a knitted fabric “A” which has a low elasticity in a width direction which is at right angle to the longitudinal direction of the baby sling and a center side in the longitudinal direction of the baby sling consists of an inner part 12 that is formed of a knitted fabric “B” which has a high elasticity in the width direction which is at right angle to the longitudinal direction of the baby sling.Type: ApplicationFiled: July 23, 2010Publication date: September 22, 2011Applicant: LUCKY INDUSTRY CO., LTD.Inventor: Junichi HIGUCHI
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Publication number: 20110213902Abstract: An information processing system includes a plurality of processors for executing processing according to a predetermined processing request sent from a different device; a switching device for performing data transfer between the individual processors and the different device; and a storage device which is connected to the switching device and enables data transfer to and from the individual processors. At least one of the processors includes a processing request storing unit for storing processing request data sent from the different device to the processor, into the storage device by data transfer. At least another one of the processors includes a processing request reading unit for reading the processing request data stored in the storage device from the storage device by data transfer.Type: ApplicationFiled: July 14, 2009Publication date: September 1, 2011Inventors: Youichi Hidaka, Junichi Higuchi, Takashi Yoshikawa
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Publication number: 20110153906Abstract: A network system that is part of a main system includes: a first PCI express-network bridge with a first control unit and a first PCI express adapter terminating a first PCI express bus; and a second PCI express-network bridge connected to the first PCI express-network bridge through a network. The second PCI express-network bridge includes a second control unit and a second PCI express adapter terminating a second PCI express bus, wherein the first control unit detects a destination of a packet sent from the first PCI express adapter, searches a physical address of the destination from a packet encapsulating table, and encapsulates the packet in a frame so that the frame includes the physical address, and wherein the second control unit removes the encapsulation tagged to the packet, and transfers the packet to the destination through the second PCI express bus by referring to a PCI express configuration register.Type: ApplicationFiled: March 1, 2011Publication date: June 23, 2011Applicant: NEC CORPORATIONInventors: Jun SUZUKI, Youichi HIDAKA, Junichi HIGUCHI
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Publication number: 20110145647Abstract: A trouble analysis apparatus is provided which includes: a system topology storing portion; an error detection information receiving portion which collects error detection information; and a trouble source determination portion which, based on both the error detection information collected by the error detection information receiving portion and system topology information stored in the system topology information storing portion, determines a trouble source functional element that is presumed as a functional element which is a source of a system trouble. Links included in the system topology information have information indicating spreading directions of error operations between the functional elements when trouble occurs. When the trouble source detection portion receives the error detection information with regard to multiple error functional elements, the trouble source determination portion sequentially selects one of the multiple error functional elements.Type: ApplicationFiled: August 4, 2009Publication date: June 16, 2011Inventors: Youichi Hidaka, Takashi Yoshikawa, Junichi Higuchi
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Patent number: 7917681Abstract: A PCI Express switch which connects a plurality of peripheral devices to an arbitrary one of a plurality of CPUs through an Ethernet is constituted by a plurality of upstream and downstream PCI Express-network bridges, an Ethernet switch, and a system manager. Each of the upstream and downstream PCI Express-network bridges includes a PCI Express adapter which terminates a link of a PCI Express bus, a network adapter which terminates a link to the Ethernet switch, and a control unit which encapsulates a TLP in a frame, the destination of which is a MAC address of a bridge to which the destination is connected to transmit and receive the frame. Because the switch according to the present invention comprising a plurality of upstream PCI Express-network bridges and a plurality of downstream PCI Express-network bridges connected to the plurality of upstream PCI Express network bridges through a network is equivalent to a conventional PCI Express switch, it is needless to change a conventional PCI software.Type: GrantFiled: February 16, 2007Date of Patent: March 29, 2011Assignee: NEC CorporationInventors: Jun Suzuki, Youichi Hidaka, Junichi Higuchi
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Publication number: 20110064089Abstract: Provided are a first PCI-PCI bridge that handles Multi Root to connect to a plurality of root complexes; a second PCI-PCI bridge that connects to an endpoint; a virtual PCI Express switch that performs a switching process between the first and second PCI-PCI bridges; and a network control device that transfers data that is to be processed in the virtual PCI Express switch to an external switch through a network without passing through a PCI-PCI bridge.Type: ApplicationFiled: May 18, 2009Publication date: March 17, 2011Inventors: Youichi Hidaka, Takashi Yoshikawa, Junichi Higuchi, Jun Suzuki
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Patent number: 7877521Abstract: A virtual PCI Express device 1600 indicates the presence of a pseudo I/O device in a PCI Express initial configuration cycle to reserve a resource space for a device anticipated to be installed in the future, and when an I/O device 1400 is inserted into an unoccupied slot 1605, a virtual PCI Express device control logic 1602 notifies a downstream PCI-PCI bridge 1504 via a hot-plugging control line 1601, and the downstream PCI-PCI bridge 1504 generates an interrupt to a CPU 1100 to notify it of insertion of the I/O device 1400 in conformance with the procedure for hot plugging defined by the PCI-SIG Standards, and configuration software 1000 invoked configures the inserted I/O device 1400.Type: GrantFiled: August 9, 2007Date of Patent: January 25, 2011Assignee: NEC CorporationInventors: Jun Suzuki, Youichi Hidaka, Junichi Higuchi, Atsushi Iwata
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Patent number: 7873056Abstract: A switch device is composed of a switch portion 1-1, input side port mapping blocks 1-4-1 to 1-4-P, output side port mapping blocks 1-5-1 to 1-5-P, and a virtualization controller (central controller) 1-0 so that the switch device can be logically divided into a plurality of switches each having a capacity smaller than a physical switch capacity or the divided switches can be logically integrated. The switch portion has a plurality of first input ports and a plurality of first output ports. Each of the input side port mapping blocks has a plurality of second input ports and inputs the signals input to the plurality of second input ports to the first input ports of the switch portion. Each of the output side port mapping blocks has a plurality of second output ports and outputs the signals output to the first output ports of the switch portion from the plurality of second output ports.Type: GrantFiled: November 18, 2005Date of Patent: January 18, 2011Assignee: NEC CorporationInventors: Junichi Higuchi, Takashi Yoshikawa, Shigeyuki Yanagimachi, Youichi Hidaka
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Publication number: 20100180062Abstract: A switch (304) includes a plurality of bridges (3041, 3042, 3043, 3044, 3045) and a switch forwarding mechanism (20). Each of the bridges transmits and receives a TLP frame complying with PCI express to and from a device connected to each of the bridges. The switch forwarding mechanism includes a plurality of ports (1, 2, 3, 4, 5) to which the bridges are connected, respectively, selects an output port in dependence on a combination of destination information on the TLP frame input from one of the plurality of ports and the port which input the TLP frame, and outputs the TLP frame from the selected output port.Type: ApplicationFiled: August 8, 2007Publication date: July 15, 2010Inventors: Youichi Hidaka, Jun Suzuki, Junichi Higuchi, Takashi Yoshikawa
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Patent number: D645245Type: GrantFiled: April 8, 2010Date of Patent: September 20, 2011Assignee: Lucky Industry Co., LtdInventor: Junichi Higuchi
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Patent number: D648521Type: GrantFiled: April 8, 2010Date of Patent: November 15, 2011Assignee: Lucky Industry Co., Ltd.Inventor: Junichi Higuchi