Patents by Inventor Junichi Higuchi

Junichi Higuchi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20120246300
    Abstract: An analyzing apparatus including includes a memory and a processor that executes a procedure, the procedure including controlling the memory to store logs of communication between a first apparatus and a second apparatus, and logs of communication between the second apparatus and a third apparatus, and extracting logs indicating a pair of a first request and a first response corresponding to the first request, communicated between the second apparatus and the third apparatus within a time range from transmission of a second request, transmitted from the first apparatus to the second apparatus, to transmission of a second response corresponding to the second request, transmitted from the second apparatus to the first apparatus, from among the logs stored in the memory.
    Type: Application
    Filed: February 23, 2012
    Publication date: September 27, 2012
    Applicant: FUJITSU LIMITED
    Inventors: Atsushi KUBOTA, Ken Yokoyama, Hirokazu Iwakura, Junichi Higuchi
  • Patent number: 8233483
    Abstract: Any packet loss is detected very quickly by means of only a series of sequence number in a multi-path environment where a transmitter and a receiver are connected to each other by way of a plurality of networks when no inversion of sequence arises in any of the networks. A communication apparatus includes a plurality of sequence buffers arranged at each network to accumulate packets until a sequence acknowledgement and an absence detecting section adapted to determine the occurrence of an absence of a packet when one or more packets are accumulated in all the sequence buffers. With this arrangement, the absence detecting section of the receiver monitors the packets staying in the sequence guaranteeing buffer arranged in each of the network, paying attention to the characteristic that packets are stored in the sequence buffers of all the networks when a packet loss takes place.
    Type: Grant
    Filed: August 28, 2008
    Date of Patent: July 31, 2012
    Assignee: NEC Corporation
    Inventors: Nobuyuki Enomoto, Hideyuki Shimonishi, Junichi Higuchi, Youichi Hidaka, Jun Suzuki, Takashi Yoshikawa
  • Patent number: 8200880
    Abstract: An I/O equipment sharing system includes CPUs, a plurality of route complexes coupled to the CPUs, upstream PCI Express-bridges coupled to the route complexes, downstream PCI Express-bridges coupled to the upstream PCI Express-bridges through a network, and I/O equipment coupled to the downstream PCI Express-bridges. In the above configuration, the I/O equipment are shared between the CPUs using the identifiers of the network (for example, Ethernet VLAN IDs), the identifiers are set so that they do not overlap between the respective CPUs and necessary I/O equipment is set to a set identifier. Further, an identifier is set to a plurality of the same I/O equipment required by the respective CPUs.
    Type: Grant
    Filed: September 19, 2007
    Date of Patent: June 12, 2012
    Assignee: NEC Corporation
    Inventors: Junichi Higuchi, Youichi Hidaka, Jun Suzuki, Atsushi Iwata
  • Publication number: 20120110233
    Abstract: Fault tolerance is improved, a functional limitation at the time of start-up of an I/O system is avoided, and a start-up time is shortened. A downstream PCI Express bridge sets a PCI Express device connected to the downstream PCI Express bridge itself, among a plurality of single root-compatible PCI Express devices shared by a plurality of root complexes connected to a plurality of upstream PCI Express bridges that exchange data with the downstream PC Express bridge itself through a network, controls and monitors a state of a physical link with the PCI Express device connected to the downstream PCI Express bridge itself, and performs monitoring and notification of an error of the PCI Express device connected to the downstream PCI Express bridge itself.
    Type: Application
    Filed: June 11, 2010
    Publication date: May 3, 2012
    Inventors: Junichi Higuchi, Youichi Hidaka, Jun Suzuki, Takashi Yoshikawa
  • Patent number: 8114355
    Abstract: A metal tube in the present invention is a metal tube for pyrolysis reaction with superior characteristics of both the heat exchange and the pyrolysis reaction, which is suitable for use in a process in which hydrocarbons are pyrolytically decomposed. The tube is a metal tube for pyrolysis reaction consisting of 3 or 4 spiral ribs 1 provided on an inner surface which are inclined at 20 to 35 degrees to an axial direction of the metal tube, and characterized in that h/Di of 0.1 to 0.2 and h/w of 0.25 to 1.0 when a height of the rib 1 is defined as “h”, a width of the rib 1 at its bottom part is defined as “w” and an inner diameter of the tube at the bottom part is defined as “Di” in cross section of the spiral rib 1.
    Type: Grant
    Filed: December 30, 2008
    Date of Patent: February 14, 2012
    Assignee: Sumitomo Metal Industries, Ltd.
    Inventors: Junichi Higuchi, Kenji Hamaogi
  • Publication number: 20120016949
    Abstract: A distributed processing system which distributes a load of a request from a client without being restricted by a processing status and processing performance of transfer processing means is provided: A distributed processing system includes: processing means for processing a request from request means and generating a reply; a switch connected to the processing means; memory means connected to the switch; and an interface, connected to a network, the request means being connected to, and to the switch, for transferring the request from the request means to the memory means and for transferring the reply to the request means, wherein the memory means comprises: first control means for determining whether State management is required for the transferred request; first storage means for storing a request that requires the State management; and second storage means for storing a request that does not require the State management, the first control means eliminates the request stored in the first or the second st
    Type: Application
    Filed: March 15, 2010
    Publication date: January 19, 2012
    Inventors: Junichi Higuchi, Youichi Hidaka, Takashi Yoshikawa
  • Patent number: 8040821
    Abstract: A switching device includes an input stage switch group 1-1 including a plurality of input lines, an output stage switch group 1-3 including a plurality of output lines, an intermediate stage switch group 1-2 arranged between the input stage switch group and the output stage switch group, and a scheduler 1-22 deciding a signal path of each of intermediate stage switches 1-21 in the intermediate stage switch group based on information input to the respective input lines. The intermediate stage switch group is divided into a plurality of groups, a plurality of the schedulers is arranged in a distributed fashion to correspond to the plurality of groups, respectively and the schedulers operate independently of one another.
    Type: Grant
    Filed: June 2, 2006
    Date of Patent: October 18, 2011
    Assignee: NEC Corporation
    Inventors: Junichi Higuchi, Youichi Hidaka, Mikiharu Yamashita, Yukihiro Hara
  • Publication number: 20110226822
    Abstract: A baby sling includes an infant holding part 10 that holds an infant in which the infant holding part 10 has a maximum width W that corresponds to a central part in a longitudinal direction of the baby sling and a gradually decrease in width between both sides in the longitudinal direction of the baby sling, wherein both sides in the longitudinal direction of the baby sling consists of outer parts 11 that are formed of a knitted fabric “A” which has a low elasticity in a width direction which is at right angle to the longitudinal direction of the baby sling and a center side in the longitudinal direction of the baby sling consists of an inner part 12 that is formed of a knitted fabric “B” which has a high elasticity in the width direction which is at right angle to the longitudinal direction of the baby sling.
    Type: Application
    Filed: July 23, 2010
    Publication date: September 22, 2011
    Applicant: LUCKY INDUSTRY CO., LTD.
    Inventor: Junichi HIGUCHI
  • Publication number: 20110213902
    Abstract: An information processing system includes a plurality of processors for executing processing according to a predetermined processing request sent from a different device; a switching device for performing data transfer between the individual processors and the different device; and a storage device which is connected to the switching device and enables data transfer to and from the individual processors. At least one of the processors includes a processing request storing unit for storing processing request data sent from the different device to the processor, into the storage device by data transfer. At least another one of the processors includes a processing request reading unit for reading the processing request data stored in the storage device from the storage device by data transfer.
    Type: Application
    Filed: July 14, 2009
    Publication date: September 1, 2011
    Inventors: Youichi Hidaka, Junichi Higuchi, Takashi Yoshikawa
  • Publication number: 20110153906
    Abstract: A network system that is part of a main system includes: a first PCI express-network bridge with a first control unit and a first PCI express adapter terminating a first PCI express bus; and a second PCI express-network bridge connected to the first PCI express-network bridge through a network. The second PCI express-network bridge includes a second control unit and a second PCI express adapter terminating a second PCI express bus, wherein the first control unit detects a destination of a packet sent from the first PCI express adapter, searches a physical address of the destination from a packet encapsulating table, and encapsulates the packet in a frame so that the frame includes the physical address, and wherein the second control unit removes the encapsulation tagged to the packet, and transfers the packet to the destination through the second PCI express bus by referring to a PCI express configuration register.
    Type: Application
    Filed: March 1, 2011
    Publication date: June 23, 2011
    Applicant: NEC CORPORATION
    Inventors: Jun SUZUKI, Youichi HIDAKA, Junichi HIGUCHI
  • Publication number: 20110145647
    Abstract: A trouble analysis apparatus is provided which includes: a system topology storing portion; an error detection information receiving portion which collects error detection information; and a trouble source determination portion which, based on both the error detection information collected by the error detection information receiving portion and system topology information stored in the system topology information storing portion, determines a trouble source functional element that is presumed as a functional element which is a source of a system trouble. Links included in the system topology information have information indicating spreading directions of error operations between the functional elements when trouble occurs. When the trouble source detection portion receives the error detection information with regard to multiple error functional elements, the trouble source determination portion sequentially selects one of the multiple error functional elements.
    Type: Application
    Filed: August 4, 2009
    Publication date: June 16, 2011
    Inventors: Youichi Hidaka, Takashi Yoshikawa, Junichi Higuchi
  • Patent number: 7917681
    Abstract: A PCI Express switch which connects a plurality of peripheral devices to an arbitrary one of a plurality of CPUs through an Ethernet is constituted by a plurality of upstream and downstream PCI Express-network bridges, an Ethernet switch, and a system manager. Each of the upstream and downstream PCI Express-network bridges includes a PCI Express adapter which terminates a link of a PCI Express bus, a network adapter which terminates a link to the Ethernet switch, and a control unit which encapsulates a TLP in a frame, the destination of which is a MAC address of a bridge to which the destination is connected to transmit and receive the frame. Because the switch according to the present invention comprising a plurality of upstream PCI Express-network bridges and a plurality of downstream PCI Express-network bridges connected to the plurality of upstream PCI Express network bridges through a network is equivalent to a conventional PCI Express switch, it is needless to change a conventional PCI software.
    Type: Grant
    Filed: February 16, 2007
    Date of Patent: March 29, 2011
    Assignee: NEC Corporation
    Inventors: Jun Suzuki, Youichi Hidaka, Junichi Higuchi
  • Publication number: 20110064089
    Abstract: Provided are a first PCI-PCI bridge that handles Multi Root to connect to a plurality of root complexes; a second PCI-PCI bridge that connects to an endpoint; a virtual PCI Express switch that performs a switching process between the first and second PCI-PCI bridges; and a network control device that transfers data that is to be processed in the virtual PCI Express switch to an external switch through a network without passing through a PCI-PCI bridge.
    Type: Application
    Filed: May 18, 2009
    Publication date: March 17, 2011
    Inventors: Youichi Hidaka, Takashi Yoshikawa, Junichi Higuchi, Jun Suzuki
  • Patent number: 7877521
    Abstract: A virtual PCI Express device 1600 indicates the presence of a pseudo I/O device in a PCI Express initial configuration cycle to reserve a resource space for a device anticipated to be installed in the future, and when an I/O device 1400 is inserted into an unoccupied slot 1605, a virtual PCI Express device control logic 1602 notifies a downstream PCI-PCI bridge 1504 via a hot-plugging control line 1601, and the downstream PCI-PCI bridge 1504 generates an interrupt to a CPU 1100 to notify it of insertion of the I/O device 1400 in conformance with the procedure for hot plugging defined by the PCI-SIG Standards, and configuration software 1000 invoked configures the inserted I/O device 1400.
    Type: Grant
    Filed: August 9, 2007
    Date of Patent: January 25, 2011
    Assignee: NEC Corporation
    Inventors: Jun Suzuki, Youichi Hidaka, Junichi Higuchi, Atsushi Iwata
  • Patent number: 7873056
    Abstract: A switch device is composed of a switch portion 1-1, input side port mapping blocks 1-4-1 to 1-4-P, output side port mapping blocks 1-5-1 to 1-5-P, and a virtualization controller (central controller) 1-0 so that the switch device can be logically divided into a plurality of switches each having a capacity smaller than a physical switch capacity or the divided switches can be logically integrated. The switch portion has a plurality of first input ports and a plurality of first output ports. Each of the input side port mapping blocks has a plurality of second input ports and inputs the signals input to the plurality of second input ports to the first input ports of the switch portion. Each of the output side port mapping blocks has a plurality of second output ports and outputs the signals output to the first output ports of the switch portion from the plurality of second output ports.
    Type: Grant
    Filed: November 18, 2005
    Date of Patent: January 18, 2011
    Assignee: NEC Corporation
    Inventors: Junichi Higuchi, Takashi Yoshikawa, Shigeyuki Yanagimachi, Youichi Hidaka
  • Publication number: 20100180062
    Abstract: A switch (304) includes a plurality of bridges (3041, 3042, 3043, 3044, 3045) and a switch forwarding mechanism (20). Each of the bridges transmits and receives a TLP frame complying with PCI express to and from a device connected to each of the bridges. The switch forwarding mechanism includes a plurality of ports (1, 2, 3, 4, 5) to which the bridges are connected, respectively, selects an output port in dependence on a combination of destination information on the TLP frame input from one of the plurality of ports and the port which input the TLP frame, and outputs the TLP frame from the selected output port.
    Type: Application
    Filed: August 8, 2007
    Publication date: July 15, 2010
    Inventors: Youichi Hidaka, Jun Suzuki, Junichi Higuchi, Takashi Yoshikawa
  • Publication number: 20100017401
    Abstract: A system analyzing apparatus obtains a message group including a message ID, a protocol, a type, and a transmission time of messages transmitted/received in a system where a hierarchical structure of protocols is defined. The apparatus detects pairs of a request message and a response message of the same message ID from the obtained message group. The apparatus identifies a request time and a response time of each of the detected pairs. The apparatus searches for a child-layer pair that has a request time and a response time between the request time and the response time of a parent-layer pair arbitrarily selected from among the pairs and that has a protocol in a layer lower than the protocol of the parent-layer pair on the basis of the identified result. The apparatus outputs the found child-layer pair as a candidate pair having a call relationship with the parent-layer pair.
    Type: Application
    Filed: August 27, 2009
    Publication date: January 21, 2010
    Applicant: FUJITSU LIMITED
    Inventors: Junichi Higuchi, Ken Yokoyama
  • Publication number: 20090269238
    Abstract: A nickel material, which comprises by mass percent, C: 0.003 to 0.20% and one or more elements selected from Ti, Nb, V and Ta: a total content less than 1.0%, the contents of these elements satisfying the relationship specified by the formula of “( 12/48)Ti+( 12/93)Nb+( 12/51)V+( 12/181)Ta—C?0”, with the balance being Ni and impurities, does not deteriorate in the mechanical properties and corrosion resistance even when it is used at a high temperature for a long time and/or it is affected by the heat affect on the occasion of welding. Therefore, it can be suitably used as a member for use in various chemical plants including facilities for producing caustic soda, vinyl chloride and so on. Each element symbol in the above formula represents the content by mass percent of the element concerned.
    Type: Application
    Filed: April 17, 2009
    Publication date: October 29, 2009
    Inventors: Hiroyuki ANADA, Junichi HIGUCHI, Kiyoko TAKEDA
  • Patent number: D645245
    Type: Grant
    Filed: April 8, 2010
    Date of Patent: September 20, 2011
    Assignee: Lucky Industry Co., Ltd
    Inventor: Junichi Higuchi
  • Patent number: D648521
    Type: Grant
    Filed: April 8, 2010
    Date of Patent: November 15, 2011
    Assignee: Lucky Industry Co., Ltd.
    Inventor: Junichi Higuchi