Abstract: A personal identification device has: a light source portion that emits infrared light with a first wavelength at the time of reading a vein pattern, and emits infrared light with a second wavelength longer than the first wavelength at the time of reading a fingerprint pattern; a light receiving sensor portion that detects a component of the infrared light reflected from a fingertip after being shone thereon from the light source portion; an amplifying portion that amplifies a detection signal obtained by the light receiving sensor portion; an A/D converting portion that converts an analog signal obtained by the amplifying portion into a digital signal; a data distributing portion that distributes the digital signal obtained by the A/D converting portion into two groups of data, of which one is vein pattern data and the other is fingerprint pattern data; and a processing portion that verifies the identity of a person based on the vein pattern data and the fingerprint pattern data distributed by the data distr

Abstract: A semiconductor chip in which a through hole penetrating through its surface and reverse surface is formed in a scribe line region in the vicinity of an active region where a functional device is formed, and a conductive member is arranged in the through portion. The through portion may be a groove opening sideward on a sidewall surface of the semiconductor chip. The through portion may be a through hole blocked from a side part of the semiconductor chip. The semiconductor chip may further include wiring for electrically connecting an internal circuit formed in the active region and the conductive member to each other.

Abstract: A personal identification device has: a light source portion that emits infrared light with a first wavelength at the time of reading a vein pattern, and emits infrared light with a second wavelength longer than the first wavelength at the time of reading a fingerprint pattern; a light receiving sensor portion that detects a component of the infrared light reflected from a fingertip after being shone thereon from the light source portion; an amplifying portion that amplifies a detection signal obtained by the light receiving sensor portion; an A/D converting portion that converts an analog signal obtained by the amplifying portion into a digital signal; a data distributing portion that distributes the digital signal obtained by the A/D converting portion into two groups of data, of which one is vein pattern data and the other is fingerprint pattern data; and a processing portion that verifies the identity of a person based on the vein pattern data and the fingerprint pattern data distributed by the data distr

Abstract: A semiconductor device including a first semiconductor chip, a second semiconductor chip bonded to the first semiconductor chip in a stacked relation, and a registration structure which causes the first and second semiconductor chips to be positioned with respect to each other by depression-projection engagement therebetween. The registration structure includes, for example, a registration recess provided on a surface of the first semiconductor chip, and a registration projection provided on a surface of the second semiconductor chip for engagement with the registration recess. The registration projection may be a spherical member provided on the surface of the second semiconductor chip.

Abstract: A method of producing a semiconductor device by dividing a semiconductor wafer into separate pieces of semiconductor chips. This method includes forming a groove with a pattern according to an outer contour of a desired semiconductor chip, holding the semiconductor wafer by a wafer holding mechanism, grinding a back surface of the semiconductor wafer held by the wafer holding mechanism, detecting opening of a bottom face of the groove during the back surface grinding process to determine timing for finishing the back surface grinding. The opening of the groove can be detected by means of a light sensor for detecting light passing through the groove or a microwave sensor for detecting a microwave passing through the groove. In addition, it is possible to suck air inside the groove so as to detect the opening of the groove by a pressure rise in the air inside the groove.

Abstract: A semiconductor device has a first semiconductor chip and a second semiconductor chip superposed on and bonded to the surface of the first semiconductor chip. In the region on the first semiconductor chip where the second semiconductor chip is bonded thereto, connection pads are arranged in positions that fit a plurality of predetermined types of semiconductor chips. On the second semiconductor chip, connection pads are arranged in positions that fit the connection pads arranged on the first semiconductor chip.

Abstract: A chip-on-chip-structure semiconductor device for a radio communication device, having a base band chip and a high-frequency chip piled up on and bonded to the surface thereof. The base band chip has a low-frequency signal processing unit for processing a signal in a first frequency band. The high-frequency chip has a high-frequency signal processing unit for processing a signal in a second frequency band of which frequency is higher than that of the first frequency band.

Abstract: A method of producing a semiconductor device by dividing a semiconductor wafer into separate pieces of semiconductor chips. This method includes forming a groove with a pattern according to an outer contour of a desired semiconductor chip, holding the semiconductor wafer by a wafer holding mechanism, grinding a back surface of the semiconductor wafer held by the wafer holding mechanism, detecting opening of a bottom face of the groove during the back surface grinding process to determine timing for finishing the back surface grinding. The opening of the groove can be detected by means of a light sensor for detecting light passing through the groove or a microwave sensor for detecting a microwave passing through the groove. In addition, it is possible to suck air inside the groove so as to detect the opening of the groove by a pressure rise in the air inside the groove.

Abstract: A semiconductor device has a first semiconductor chip and a second semiconductor chip superposed on and bonded to the surface of the first semiconductor chip. In the region on the first semiconductor chip where the second semiconductor chip is bonded thereto, connection pads are arranged in positions that fit a plurality of predetermined types of semiconductor chips. On the second semiconductor chip, connection pads are arranged in positions that fit the connection pads arranged on the first semiconductor chip.

Abstract: A semiconductor chip having a functional bump provided on a surface of a semiconductor substrate thereof for electrical connection between an internal circuit thereof and a solid device, and a dummy bump not serving for the electrical connection between the internal circuit and the solid device. The dummy bump may be a stress relieving bump for relieving stresses exerted thereon. The dummy bump may be connected to a low impedance portion. The functional bump and the dummy bump may be provided on a surface protective film. In this case, the dummy bump is provided on a recess formed in the surface protective film.

Abstract: A production process for a semiconductor device having a metal electrode on a semiconductor substrate thereof. A metal electrode portion is formed on a surface of another substrate for electrode transfer. Then, the metal electrode portion is transferred from the electrode transfer substrate onto the semiconductor substrate by pressing together the electrode transfer substrate and the semiconductor substrate. The electrode transfer substrate has, for example, a seed film provided on the surface thereof, and the formation of the metal electrode portion on the electrode transfer substrate may be achieved by depositing a material for the metal electrode on the seed film by plating. The electrode transfer substrate may have an insulating film which covers a surface of the seed film except a portion thereof on which the metal electrode portion is to be formed.

Abstract: A semiconductor device including a first semiconductor chip, a second semiconductor chip bonded to the first semiconductor chip in a stacked relation, and a registration structure which causes the first and second semiconductor chips to be positioned with respect to each other by depression-projection engagement therebetween. The registration structure includes, for example, a registration recess provided on a surface of the first semiconductor chip, and a registration projection provided on a surface of the second semiconductor chip for engagement with the registration recess. The registration projection may be a spherical member provided on the surface of the second semiconductor chip.

Abstract: A semiconductor device including a first semiconductor chip, a second semiconductor chip bonded to the first semiconductor chip in a stacked relation, and a registration structure which causes the first and second semiconductor chips to be positioned with respect to each other by depression-projection engagement therebetween. The registration structure includes, for example, a registration recess provided on a surface of the first semiconductor chip, and a registration projection provided on a surface of the second semiconductor chip for engagement with the registration recess. The registration projection may be a spherical member provided on the surface of the second semiconductor chip.

Abstract: A semiconductor device having a metal layer at the peripheral area surrounding an element forming area formed on a semiconductor substrate. This metal layer may be connected to the grounding potential or the power potential. The peripheral area is a scribing line area for example. The metal layer may be formed simultaneously with the formation of a bump within the element forming area.

Abstract: A semiconductor chip (3) to be positioned with a front face thereof downward for formation of a chip-on-chip structure has electrode marks (35) provided on a back face (34) thereof. The electrode marks (35) are respectively provided in association with a plurality of electrodes (33) provided on the front face (31) of the semiconductor chip in the same arrangement as the arrangement of the electrodes (33). The arrangement of the electrode marks (35) represents the arrangement of the electrodes (33) on the front face (31) when viewed from the side of the back face (34) of the semiconductor chip 3. Therefore, the semiconductor chip (3) can easily be positioned with the front face downward on the basis of the electrode marks (35).

Abstract: Upon receiving an encipherment command, an enciphered authentication data generation circuit generates an enciphered authentication data based on a basic authentication data including a random number portion using an encipherment rule. The encipherment rule changes according to the number of supplied encipherment commands. A transmission circuit 7 transmits the enciphered authentication data. A reception circuit 9 receives the enciphered authentication data transmitted from a second device 300. A prohibition command output circuit 11 determines whether the enciphered authentication data transmitted from the second device 300 matches with an enciphered authentication data that would be generated if the same number of encipherment commands were supplied to an enciphered authentication data generation circuit of a first device 200, and outputs a prohibition command to prohibit a transmission of the data to be transmitted when the determination result is negative.

Abstract: A semiconductor device having a plurality of semiconductor chips respectively joined to predetermined positions on a surface of a solid, and a frame holding the plurality of semiconductor chips in a relative positional relationship corresponding to joint positions on the surface of the solid. The solid may be another semiconductor chip or a wiring board. The plurality of semiconductor chips may be bonded to a surface, opposite to the surface, of the solid, of the frame. The plurality of semiconductor chips may be respectively fitted in through holes formed in the frame.

Abstract: A semiconductor chip having a functional bump provided on a surface of a semiconductor substrate thereof for electrical connection between an internal circuit thereof and a solid device, and a dummy bump not serving for the electrical connection between the internal circuit and the solid device. The dummy bump may be a stress relieving bump for relieving stresses exerted thereon. The dummy bump may be connected to a low impedance portion. The functional bump and the dummy bump may be provided on a surface protective film. In this case, the dummy bump is provided on a recess formed in the surface protective film.

Abstract: A production process for a semiconductor device having a metal electrode on a semiconductor substrate thereof. A metal electrode portion is formed on a surface of another substrate for electrode transfer. Then, the metal electrode portion is transferred from the electrode transfer substrate onto the semiconductor substrate by pressing together the electrode transfer substrate and the semiconductor substrate. The electrode transfer substrate has, for example, a seed film provided on the surface thereof, and the formation of the metal electrode portion on the electrode transfer substrate may be achieved by depositing a material for the metal electrode on the seed film by plating. The electrode transfer substrate may have an insulating film which covers a surface of the seed film except a portion thereof on which the metal electrode portion is to be formed.

Abstract: An IC card 3 has an ID number ID0, for permitting itself to be identified, stored in memory provided therein. The IC card also has additional ID numbers ID1 to IDn stored in memory areas 17-1 to 17-n that are secured therein so as to be allocated to the individual providers that manage the reader/writers with which the IC card communicates. These additional ID numbers ID1 to IDn are used to prevent unauthorized use of the IC card, and are issued so as to be unique to the IC card by the individual providers that use the memory areas 17-1 to 17-n. Thus, the additional ID numbers ID1 to IDn differ from one IC card to another.