Patents by Inventor Junichi Inutsuka

Junichi Inutsuka has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9204070
    Abstract: An integrating A/D converter includes: a comparator comparing an input voltage to a reference voltage having a ramp waveform, a voltage value of which linearly varies with time; a higher-order bit counter starting operation or stopping operation triggered by inversion of an output signal of the comparator and outputting higher order bits by performing counting in a cycle of a clock signal; and a time-to-digital converter latching phase information of the clock signal corresponding to plural signals obtained by delaying an output signal of the comparator and decoding the latched values to output lower order bits having higher resolution than the clock cycle.
    Type: Grant
    Filed: April 26, 2011
    Date of Patent: December 1, 2015
    Assignee: Sony Corporation
    Inventors: Tomohiro Takahashi, Hiroki Ui, Junichi Inutsuka, Nozomu Takatori
  • Patent number: 8957996
    Abstract: A solid-state imaging device includes: a pixel unit in which a plurality of pixels that perform photoelectric conversion are arranged in the form of a matrix; a pixel signal reading unit performing reading of a pixel signal in a signal line from the pixel unit in the unit of plural pixels, and performing column signal processing with respect to an input signal; and an evaluation pattern generation unit receiving a control signal and a signal line interception signal and generating a pseudo-evaluation pattern according to the control signal.
    Type: Grant
    Filed: April 14, 2011
    Date of Patent: February 17, 2015
    Assignee: Sony Corporation
    Inventors: Takumi Kajihara, Junichi Inutsuka
  • Patent number: 8749674
    Abstract: A solid-state imaging including a comparing circuit, an inverting circuit, and a masking circuit, and that performs column parallel AD conversion processing of analog pixel signals output from a plurality of pixels arranged in a two-dimensional matrix form. The comparing circuit outputs a difference signal obtained by comparing each of the pixel signals outputted from the pixels with a reference signal having a ramp waveform. The inverting circuit inverts a logic of the difference signal outputted from the comparing circuit. The masking circuit masks an output of an output signal of the inverting circuit to a circuit in a subsequent stage during an input offset canceling period in which the comparing circuit cancels an input offset between the pixel signal and the reference signal.
    Type: Grant
    Filed: October 24, 2011
    Date of Patent: June 10, 2014
    Assignee: Sony Corporation
    Inventors: Yuichiro Araki, Takahisa Ueno, Junichi Inutsuka, Nozomu Takatori, Yasuaki Hisamatsu
  • Patent number: 8599279
    Abstract: A solid-state imaging apparatus includes a comparator for comparing a pixel signal obtained by a pixel section and a reference signal the value of which varies in a stepwise manner, an analog-digital converter for outputting, as a digital value, the amount of time when the pixel signal and the reference signal change levels by the comparator; a reset signal generator for generating a reset signal that triggers a reset operation to be input to the comparator in order to adjust the reference in the analog-digital converter, and a waveform processor provided between the reset signal generator and the comparator for increasing the degree of dullness of a waveform of the reset signal.
    Type: Grant
    Filed: September 14, 2011
    Date of Patent: December 3, 2013
    Assignee: Sony Corporation
    Inventors: Yuuki Yamagata, Ken Koseki, Masaru Kikuchi, Yoshiaki Inada, Junichi Inutsuka, Akari Tajima
  • Publication number: 20120038804
    Abstract: A solid-state imaging including a comparing circuit, an inverting circuit, and a masking circuit, and that performs column parallel AD conversion processing of analog pixel signals output from a plurality of pixels arranged in a two-dimensional matrix form. The comparing circuit outputs a difference signal obtained by comparing each of the pixel signals outputted from the pixels with a reference signal having a ramp waveform. The inverting circuit inverts a logic of the difference signal outputted from the comparing circuit. The masking circuit masks an output of an output signal of the inverting circuit to a circuit in a subsequent stage during an input offset canceling period in which the comparing circuit cancels an input offset between the pixel signal and the reference signal.
    Type: Application
    Filed: October 24, 2011
    Publication date: February 16, 2012
    Applicant: SONY CORPORATION
    Inventors: Yuichiro Araki, Takahisa Ueno, Junichi Inutsuka, Nozomu Takatori, Yasuaki Hisamatsu
  • Publication number: 20120001057
    Abstract: A solid-state imaging apparatus includes a comparator for comparing a pixel signal obtained by a pixel section and a reference signal the value of which varies in a stepwise manner, an analog-digital converter for outputting, as a digital value, the amount of time when the pixel signal and the reference signal change levels by the comparator; a reset signal generator for generating a reset signal that triggers a reset operation to be input to the comparator in order to adjust the reference in the analog-digital converter, and a waveform processor provided between the reset signal generator and the comparator for increasing the degree of dullness of a waveform of the reset signal.
    Type: Application
    Filed: September 14, 2011
    Publication date: January 5, 2012
    Applicant: SONY CORPORATION
    Inventors: Yuuki Yamagata, Ken Koseki, Masaru Kikuchi, Yoshiaki Inada, Junichi Inutsuka, Akari Tajima
  • Publication number: 20110292265
    Abstract: An integrating A/D converter includes: a comparator comparing an input voltage to a reference voltage having a ramp waveform, a voltage value of which linearly varies with time; a higher-order bit counter starting operation or stopping operation triggered by inversion of an output signal of the comparator and outputting higher order bits by performing counting in a cycle of a clock signal; and a time-to-digital converter latching phase information of the clock signal corresponding to plural signals obtained by delaying an output signal of the comparator and decoding the latched values to output lower order bits having higher resolution than the clock cycle.
    Type: Application
    Filed: April 26, 2011
    Publication date: December 1, 2011
    Applicant: Sony Corporation
    Inventors: Tomohiro Takahashi, Hiroki Ui, Junichi Inutsuka, Nozomu Takatori
  • Publication number: 20110279724
    Abstract: A solid-state imaging device includes: a pixel unit in which a plurality of pixels that perform photoelectric conversion are arranged in the form of a matrix; a pixel signal reading unit performing reading of a pixel signal in a signal line from the pixel unit in the unit of plural pixels, and performing column signal processing with respect to an input signal; and an evaluation pattern generation unit receiving a control signal and a signal line interception signal and generating a pseudo-evaluation pattern according to the control signal.
    Type: Application
    Filed: April 14, 2011
    Publication date: November 17, 2011
    Applicant: SONY CORPORATION
    Inventors: Takumi Kajihara, Junichi Inutsuka
  • Patent number: 8035696
    Abstract: A solid-state imaging apparatus includes comparing means for comparing a pixel signal obtained by a pixel section and a reference signal the value of which varies in a stepwise manner, analog-digital converting means for outputting, as a digital value, the amount of time when the pixel signal and the reference signal change levels by the comparing means, reset signal generating means for generating a reset signal that triggers a reset operation to be input to the comparing means in order to adjust the reference in the analog-digital converting means, and waveform processing means provided between the reset signal generating means and the comparing means for increasing the degree of dullness of a waveform of the reset signal.
    Type: Grant
    Filed: February 1, 2008
    Date of Patent: October 11, 2011
    Assignee: Sony Corporation
    Inventors: Yuuki Yamagata, Ken Koseki, Masaru Kikuchi, Yoshiaki Inada, Junichi Inutsuka, Akari Tajima
  • Patent number: 7626618
    Abstract: A solid-state image pickup device includes a pixel array section including a plurality of unit pixels, a reference signal production section configured to generate a reference signal and output a detection value, a comparison section configured to compare a reset level upon resetting, a counter configured to start a counting action and continue the counting action to measure a comparison time period in order to obtain count values corresponding to the reset level and the signal level, a detection section configured to retain a result of the comparison of said comparison section when the reset level reaches the detection value as a result of the detection of a black sun phenomenon for a fixed period of time, and a prevention section configured to prevent a black sun phenomenon based on a result of the detection of said detection section.
    Type: Grant
    Filed: October 2, 2006
    Date of Patent: December 1, 2009
    Assignee: Sony Corporation
    Inventors: Kouzo Adachi, Yoshiaki Inada, Junichi Inutsuka, Ken Koseki
  • Publication number: 20090086067
    Abstract: A solid-state imaging includes a comparing circuit, an inverting circuit, and a masking circuit, and performs column parallel AD conversion processing of analog pixel signals outputted from a plurality of pixels arranged in a two-dimensional matrix form. The comparing circuit outputs a difference signal obtained by comparing each of the pixel signals outputted from the pixels with a reference signal having a ramp waveform. The inverting circuit inverts a logic of the difference signal outputted from the comparing circuit. The masking circuit masks an output of an output signal of the inverting circuit to a circuit in a subsequent stage during an input offset canceling period in which the comparing circuit is canceling an input offset between the pixel signal and the reference signal.
    Type: Application
    Filed: September 23, 2008
    Publication date: April 2, 2009
    Applicant: SONY CORPORATION
    Inventors: Yuichiro Araki, Takahisa Ueno, Junichi Inutsuka, Nozomu Takatori, Yasuaki Hisamatsu
  • Publication number: 20080186388
    Abstract: A solid-state imaging apparatus includes comparing means for comparing a pixel signal obtained by a pixel section and a reference signal the value of which varies in a stepwise manner, analog-digital converting means for outputting, as a digital value, the amount of time when the pixel signal and the reference signal change levels by the comparing means, reset signal generating means for generating a reset signal that triggers a reset operation to be input to the comparing means in order to adjust the reference in the analog-digital converting means, and waveform processing means provided between the reset signal generating means and the comparing means for increasing the degree of dullness of a waveform of the reset signal.
    Type: Application
    Filed: February 1, 2008
    Publication date: August 7, 2008
    Applicant: SONY CORPORATION
    Inventors: Yuuki Yamagata, Ken Koseki, Masaru Kikuchi, Yoshiaki Inada, Junichi Inutsuka, Akari Tajima
  • Publication number: 20070080376
    Abstract: A solid-state image pickup device includes a pixel array section including a plurality of unit pixels, a reference signal production section configured to generate a reference signal and output a detection value, a comparison section configured to compare a reset level upon resetting, a counter configured to start a counting action and continue the counting action to measure a comparison time period in order to obtain count values corresponding to the reset level and the signal level, a detection section configured to retain a result of the comparison of said comparison section when the reset level reaches the detection value as a result of the detection of a black sun phenomenon for a fixed period of time, and a prevention section configured to prevent a black sun phenomenon based on a result of the detection of said detection section.
    Type: Application
    Filed: October 2, 2006
    Publication date: April 12, 2007
    Inventors: Kouzo Adachi, Yoshiaki Inada, Junichi Inutsuka, Ken Koseki