Abstract: Measuring the degree of restoration during the restoring treatment of the used molding sand and comparing the measured degree of restoration to a permissible degree, comprising the following steps: First, the restored sand is photographed to project it as a picture on a monitor. A picture-processing device divides that picture into a certain number of picture parts and the brightness of each picture part is compared to the standard brightness, which is chosen beforehand. The degree of restoration is judged based on the number of picture parts that are lighter or darker than the standard brightness. The restoring treatment is stopped when the result of the comparison shows that the restoration has reached the permissible degree, but is continued when the result does not reach it. The operation of measuring the degree of restoration during the treatment is also repeated until it reaches the permissible degree. Then the treatment is stopped.

Abstract: A pointing device for use in moving a cursor displayed on a display, includes a pressure sensing sheet including first through fourth pressure detection elements and a base member mounted on the pressure sensing sheet. The base member is provided with first through fourth protrusions formed on its under surface opposite to the pressure sensing sheet in facing relation to the first through fourth pressure detection elements, respectively. The base member is provided with an operation shaft formed on an upper surface of the base member which projects upwardly therefrom. The device further comprises a cap member coupled to the operation shaft of the base member.

Abstract: A microcomputer system includes a master processor and a coprocessor interconnected via a bus. The coprocessor supplies first, second and third signals to the master process, the first (BUSY) signal taking an active level when the coprocessor requests a wait condition of the master processor, the second (CPERR) signal taking an active level at least when the first signal is changed to the inactive level in a state of occurrence of an arithmetic exception in the coprocessor, and the third (CPEND) signal taking an active level when the coprocessor is free of execution of an instruction and of an occurrence of an arithmetic exception.

Abstract: A microprocessor having a multi-stage pipeline structure, comprises: a status flip-flop having its output changing when the instruction code of a predetermined instruction is decoded in the microprocessor; a circuit for outputting the output of the status flip-flop in synchronism with the output timing of an address for the bus cycle period of the microprocessor; and a circuit for sequentially storing the information, which appears at the input/output terminals of the microprocessor, as time-series data outside of the microprocessor. The time-series data is edited by discriminating the bus cycle of the microprocessor belongs to the bus cycle following an instruction on or before the predetermined instruction for changing the output of the status flip-flop or the bus cycle following an instruction on or after the predetermined instruction, with reference to the information outputted from the status flip-flop inside of the microprocessor to the outside of the same.

Abstract: A rounding unit for use in arithmetic processing of register floating point data. The rounding unit comprises a mantissa part register for storing the mantissa part of the floating point data, an exponent part register for storing the exponent part of the floating point data, a judging circuit for judging whether the rounding operation is raising or truncating, a mantissa part incrementer for incrementing the mantissa part of the floating point data and outputting a carry signal when it is overflowed, an exponent part incrementer for incrementing the exponent part of the floating point data and a selection circuit which, in response to the carry signal from the mantissa part incrementer and the judging signal from the judging circuit, orders the mantissa part register to store a constant data of which the most significant bit is "1" and the other bits are "0", when the rounding operation is raising and the carry signal is present.

Abstract: A normalizing circuit is disclosed which can make bit shift operation for a bit string. The normalizing circuit has a leading "one" detector, an encoder and a bit shifter. The leading "one" detector detects a bit position of a leading "one" among a bit string and produces a signal to indicate the bit position of the leading "one". The encoder produces a control signal by which bit shift operation is executed. The bit shifter has a plurality of shift paths to shift leftwardly or rightwardly the bit string such that the leading "one" bit is positioned at the most left position or the most right position. One of the plurality of shift paths is selected by the control signal produced by the encoder. Thus, bit shift operation of the leading "one" bit can be executed at a high speed.

Abstract: A microcomputer includes a central processing unit and at least one input-output (peripheral) unit selected by an address on a single semiconductor chip. The microcomputer further has an address changing circuit for assigning an arbitrary address to the input-output unit, so that the input-output address can be accessed by a variable address.