Abstract: A display device comprises: control circuit substrates disposed in a rear surface of a display panel, a control circuit that generates a control signal in order to control a data line driving circuit and a gate line driving circuit; gate connecting wirings; and a substrate connecting wiring, wherein each of the control circuit substrates includes: a first-side gate connecting part disposed on a first side; and a second-side substrate connecting part disposed on a second side, and the first-side gate connecting part and the second-side substrate connecting part are disposed so as not to overlap each other when the control circuit substrate is viewed in the first direction from the first side toward the second side.

Abstract: A liquid crystal display device includes: an image processing circuit configured to carry out image processing on input display data input from an outside; and a timing controller configured to receive display data subjected to the image processing by the image processing circuit, to thereby generate a plurality of timing signals for defining an operation timing of a data line driving circuit and an operation timing of a gate line driving circuit, the image processing circuit being configured to receive at least one timing signal among the plurality of timing signals generated by the timing controller, to thereby carry out the image processing on the input display data based on the received at least one timing signal.

Abstract: A display device with built-in touch detection function, the display device includes source lines, detection lines, common lines, gate lines, pixels, control elements, each applying to a corresponding pixel a voltage, a common line driving circuit including a pulse generator that sequentially drives the common lines, the pulse generator generating a first pulse signal for each of the common lines, a pulse compensator, the pulse compensator generating a second pulse signal based on the first pulse signal and the potential input from each of the common lines, the second pulse signal reducing a variation in potential at each of the common lines in response to a potential at each of the source lines, the pulse compensator outputting the second pulse signal to a corresponding common line, and a touch detector that detects a position specified by a user according to the second pulse signal.

Abstract: A display device includes a divided display region that includes pixels and gate drivers each configured to scan gate lines included in the divided display region. The display device also includes source drivers each configured to output, for each of groups of data lines, a video signal based on a grayscale signal in order from a corresponding gate driver side based on each delay amount set in advance and a register unit configured to store the each delay amount. The register unit stores the each delay amount so that, when at least one gate driver scans in a first order from an edge of the divided display region toward a center, the video signal corresponding to the pixels positioned on a centermost side of the display region is output to the pixels, in a period including a part of a vertical flyback period of after one frame period has finished.

Abstract: A display device including a display portion, a source driver, a gate driver and a controller, wherein the controller is configured to control the source driver and the gate driver based on a control mode for displaying the frame image on the display portion, in a basic control mode, the controller is configured to display a frame image on the display portion by causing the gate driver to progressively scan gate signal lines, in a low frequency control mode, the controller is configured to determine whether a regional signal is on in a specific region corresponding to specific gate signal lines, when it is determined that the regional signal is off, the controller is configured to display a sub-frame image on the display portion by causing the gate driver to perform interlaced scanning of the gate signal lines every K lines in the first frame frequency F1.

Abstract: A display device including a controller configured to control the source driver and the gate driver based on a control mode for displaying the frame image on the display portion, wherein: in the basic control mode, the controller is configured to display the frame image on the display portion by causing the gate driver to progressively scan all of the N gate signal lines within a predetermined time period, in the low-power control mode, the controller is configured to display a sub-frame image on the display portion by causing the gate driver to scan W gate signal lines within the predetermined time period, and to perform interlaced scanning of the plurality of gate signal lines every K lines, the control mode is configured to shift from the basic control mode to the low-power control mode by way of the first shift control mode.

Abstract: In a liquid crystal display device, in a first half of one horizontal scanning period, a first data line driver circuit outputs a corrected grayscale voltage obtained by correcting an input grayscale voltage corresponding to input display data to a plurality of data lines, and a second data line driver circuit is electrically disconnected from the plurality of data lines, and in a second half of one horizontal scanning period, the second data line driver circuit outputs an input grayscale voltage corresponding to the input display data to the plurality of data lines, and the first data line driver circuit is electrically disconnected from the plurality of data lines.

Abstract: A key switch device includes: a key top that includes an operating surface; a pair of link members that is interlocked with each other to move the key top upward and downward; a frame member that includes a leg portion extending downward and a flange portion provided at an end of the leg portion, and pivotably supports the pair of the link members; and a support plate that includes a through hole through which the leg portion and the flange portion penetrate, and a projection portion projecting upwardly from a part of an outer periphery of the through hole toward an inside of the through hole.

Abstract: In the case where the gray-scale value of the pixel X is the minimum gray-scale value, the data line driving circuit (4) outputs a video signal having a voltage obtained by correcting the positive polarity minimum gray-scale voltage corresponding to the minimum gray-scale value only when outputting a positive polarity video signal. In the above, the data line driving circuit (4) outputs the video signal having the voltage obtained by correcting the positive polarity minimum gray-scale voltage, using a voltage correction amount larger than that which is used in outputting the video signal having the voltage obtained by correcting the positive polarity gray-scale voltage corresponding to the intermediate gray-scale value.

Abstract: A key switch device includes a key top; a link member that guides an elevating operation of the key top while being interlocking with the key top, the link member including a rotatable shaft and a sliding shaft that is connected to the key top; a membrane sheet that includes a contact that opens and closes in accordance with the elevating operation of the key top; a back plate; a housing that holds the rotatable shaft of the link member to the back plate; and a pushing unit that pushes the link member such that the sliding shaft moves away from the back plate.

Abstract: A liquid crystal display device which includes one image signal line which is connected to a plurality of pixels, a scanning line drive part which outputs an ON voltage to the respective pixels in a predetermined order, and a data line drive part which outputs image signal voltages. The data line drive part outputs a gray level signal voltage corresponding to a gray level value of the pixel as an image signal voltage in a first period, and outputs a correction gray level signal voltage different from the gray level signal voltage as an image signal voltage in a second period which precedes the first period. The liquid crystal display device further includes a control part which generates the correction gray level signal voltage based on the gray level value of the pixel and one or plurality of gray level values of pixels which precede the pixel in order.

Abstract: A data line driving section (6) outputs a video signal voltage for each pixel to a data line (DL) for each predetermined period in order. In outputting a video signal voltage for a pixel, the data line driving section (6) outputs a gradation signal voltage having a voltage corresponding to a gradation value of the pixel as the video signal voltage during a second part of the predetermined period, and outputs a correction gradation signal voltage different from the gradation signal voltage as the video signal voltage during a first part of the predetermined period. A control section (4) changes a relationship between the correction gradation signal voltage and the gradation signal voltage based on a combination of the gradation value of the pixel and a gradation value of a pixel preceding the pixel.

Abstract: A display device includes a divided display region that includes pixels and gate drivers each configured to scan gate lines included in the divided display region. The display device also includes source drivers each configured to output, for each of groups of data lines, a video signal based on a grayscale signal in order from a corresponding gate driver side based on each delay amount set in advance and a register unit configured to store the each delay amount. The register unit stores the each delay amount so that, when at least one gate driver scans in a first order from an edge of the divided display region toward a center, the video signal corresponding to the pixels positioned on a centermost side of the display region is output to the pixels, in a period including a part of a vertical flyback period of after one frame period has finished.

Abstract: Provided is a liquid crystal display device, including: a data line; a plurality of pixel circuits; an output grayscale value generating circuit for outputting an output grayscale value obtained by correcting a display grayscale value indicating a grayscale potential having one of positive polarity and negative polarity; and a data-line driving circuit for selectively outputting an output potential having one of positive polarity and negative polarity corresponding to the output grayscale value to the data line. The data-line driving circuit outputs the potential so that the positive-polarity output potential corresponding to a smallest output grayscale value becomes lower than a positive-polarity grayscale potential indicated by a smallest one of the display grayscale values and that the negative-polarity output potential corresponding to the smallest output grayscale value becomes higher than a negative-polarity grayscale potential indicated by the smallest one of the display grayscale values.

Abstract: A display device includes a frame frequency conversion circuit configured to convert a frame frequency of an input display data and a timing control circuit configured to control a first drive circuit and a second drive circuit based on a frame frequency after the conversion. The display device generates at least two display areas on the display panel. The at least two display areas display images at different frame frequencies. The display device further includes a switch unit configured to display an image at the frame frequency before the conversion at one of the at least two display areas and configured to display an image at the frame frequency after the conversion at another one of the at least two display areas. At least one of a boundary position and a size of the at least two display areas varies with time.

Abstract: A liquid crystal display device includes a plurality of pixel circuits, data lines, and a data-line driving circuit connected to the data lines. Each of the pixel circuits includes a pixel capacitance having one end provided with a common potential. In accordance with a grayscale value for one of the plurality of pixel circuits, the data-line driving circuit selectively outputs a positive-polarity signal and a negative-polarity signal to the one pixel circuit. The data-line driving circuit outputs the positive-polarity signal and the negative-polarity signal so that an average of a potential of the positive-polarity signal and a potential of the negative-polarity signal corresponding to the grayscale value changes in accordance with the grayscale value, a temperature, and a position of the one pixel circuit.

Abstract: A data line driving section (6) outputs a video signal voltage for each pixel to a data line (DL) for each predetermined period in order. In outputting a video signal voltage for a pixel, the data line driving section (6) outputs a gradation signal voltage having a voltage corresponding to a gradation value of the pixel as the video signal voltage during a second part of the predetermined period, and outputs a correction gradation signal voltage different from the gradation signal voltage as the video signal voltage during a first part of the predetermined period. A control section (4) changes a relationship between the correction gradation signal voltage and the gradation signal voltage based on a combination of the gradation value of the pixel and a gradation value of a pixel preceding the pixel.

Abstract: In a liquid crystal display device that performs horizontal divisional-drive operation, writing of a pixel voltage to pixels in a head row in vertical scanning of each display region becomes insufficient, and a dark line is displayed when the head row is located at the screen center, deteriorating the image quality. For example, a scanning line drive circuit to drive gate lines of a lower display region sequentially outputs a scanning pulse (Pk) for selecting a (n+k)th row of an image. A video line drive circuit to drive source lines of the lower display region outputs a pixel voltage corresponding to data (Dn+k) during a period of the scanning pulse (Pk). An application start timing of the pixel voltage with respect to application of the scanning pulse (Pk) is set earlier in a (n+1)th row, a head row, during an effective scanning period (TEFF) than in the subsequent rows.

Abstract: A data line driving section (6) outputs a video signal voltage for each pixel to a data line (DL) for each predetermined period in order. In outputting a video signal voltage for a pixel, the data line driving section (6) outputs a gradation signal voltage having a voltage corresponding to a gradation value of the pixel as the video signal voltage during a second part of the predetermined period, and outputs a correction gradation signal voltage different from the gradation signal voltage as the video signal voltage during a first part of the predetermined period. A control section (4) changes a relationship between the correction gradation signal voltage and the gradation signal voltage based on a combination of the gradation value of the pixel and a gradation value of a pixel preceding the pixel.

Abstract: A liquid crystal display device which includes one image signal line which is connected to a plurality of pixels, a scanning line drive part which outputs an ON voltage to the respective pixels in a predetermined order, and a data line drive part which outputs image signal voltages. The data line drive part outputs a gray level signal voltage corresponding to a gray level value of the pixel as an image signal voltage in a first period, and outputs a correction gray level signal voltage different from the gray level signal voltage as an image signal voltage in a second period which precedes the first period. The liquid crystal display device further includes a control part which generates the correction gray level signal voltage based on the gray level value of the pixel and one or plurality of gray level values of pixels which precede the pixel in order.