Patents by Inventor Junichi Masui
Junichi Masui has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11919371Abstract: A window stabilization mechanism includes a rail provided on a first cabin frame provided on one side of a window, and has a first end and a second end opposite to the first end in the lengthwise direction of the rail. A sliding member is provided on a windowpane and is configured to slide on the rail. The sliding member is located at a first end when the window is opened and at a second end when the window is closed. A lock mechanism is configured to lock the windowpane to the first cabin frame when the window is closed. A window support member is configured to abut on the windowpane when the window is closed, and to press the windowpane in an oblique direction from the windowpane toward the rail and from the second end toward the first end when the windowpane is locked by a lock mechanism.Type: GrantFiled: March 31, 2021Date of Patent: March 5, 2024Assignee: KUBOTA CORPORATIONInventors: Junichi Murakami, Yusuke Hada, Kohei Masui
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Patent number: 10795229Abstract: An element substrate of an electro-optical device includes, in a peripheral area surrounding a pixel area, a metal wiring provided at one surface side of a first substrate that is a substrate body, and a plurality of second light-shielding layers overlapping with the metal wiring between the first substrate and the metal wiring. A second light-shielding interlayer area overlapping with the metal wiring is present between the plurality of second light-shielding layers. A third light-shielding layer is formed in a manner overlapping in a plan view with the second light-shielding interlayer area between the first substrate and the metal wiring. Surfaces of the second light-shielding layer and the third light-shielding layer at the first substrate side have lower reflectance than a surface of the metal wiring at the first substrate side.Type: GrantFiled: October 29, 2018Date of Patent: October 6, 2020Assignee: SEIKO EPSON CORPORATIONInventor: Junichi Masui
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Patent number: 10353254Abstract: An electro-optical device includes a substrate, a first terminal that is formed on the substrate, a second terminal that is formed on the substrate and arranged in a first direction with respect to the first terminal, a third terminal that is formed on the substrate, and arranged in a second direction different from the first direction with respect to the first terminal, and of which the position in the first direction is the same as the first terminal, and a wiring that is formed on the substrate and connected to the third terminal.Type: GrantFiled: July 10, 2017Date of Patent: July 16, 2019Assignee: SEIKO EPSON CORPORATIONInventors: Junichi Masui, Tomoaki Miyashita
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Publication number: 20190129263Abstract: An element substrate of an electro-optical device includes, in a peripheral area surrounding a pixel area, a metal wiring provided at one surface side of a first substrate that is a substrate body, and a plurality of second light-shielding layers overlapping with the metal wiring between the first substrate and the metal wiring. A second light-shielding interlayer area overlapping with the metal wiring is present between the plurality of second light-shielding layers. A third light-shielding layer is formed in a manner overlapping in a plan view with the second light-shielding interlayer area between the first substrate and the metal wiring. Surfaces of the second light-shielding layer and the third light-shielding layer at the first substrate side have lower reflectance than a surface of the metal wiring at the first substrate side.Type: ApplicationFiled: October 29, 2018Publication date: May 2, 2019Applicant: SEIKO EPSON CORPORATIONInventor: Junichi MASUI
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Publication number: 20180031892Abstract: An electro-optical device includes a substrate, a first terminal that is formed on the substrate, a second terminal that is formed on the substrate and arranged in a first direction with respect to the first terminal, a third terminal that is formed on the substrate, and arranged in a second direction different from the first direction with respect to the first terminal, and of which the position in the first direction is the same as the first terminal, and a wiring that is formed on the substrate and connected to the third terminal.Type: ApplicationFiled: July 10, 2017Publication date: February 1, 2018Applicant: SEIKO EPSON CORPORATIONInventors: Junichi MASUI, Tomoaki MIYASHITA
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Patent number: 8717275Abstract: A circuit includes a first logic circuit section that outputs a signal that could be in an active voltage level depending on a transfer-signal input from a shift register throughout a display period and outputs a signal whose voltage is constant at the active voltage level throughout an off sequence period; an enable signal output section that outputs an enable signal that is pulsed during the display period; and a second logic circuit section that outputs a signal corresponding to a logical product of the output signal of the first logic circuit section and the enable signal. The enable signal output section keeps the voltage of the enable signal constant at the active voltage level throughout the off sequence period.Type: GrantFiled: November 18, 2011Date of Patent: May 6, 2014Assignee: Seiko Epson CorporationInventor: Junichi Masui
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Patent number: 8643014Abstract: An electro-optical device is provided with a data line which are provided in a pixel region, a pixel electrode formed from a transparent conductive material which is upper layer than the data line, a storage capacitance electrode which is provided in a layer between the pixel electrode and the data line so as to face the pixel electrode via a capacitance insulation film, an additional capacitance which has a first capacitance electrode and a second capacitance electrode which is formed in the same layer as the pixel electrode and the storage capacitance electrode, respectively. The second capacitance electrode is electrically connected to the data line.Type: GrantFiled: November 14, 2011Date of Patent: February 4, 2014Assignee: Seiko Epson CorporationInventor: Junichi Masui
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Patent number: 8269710Abstract: An electro-optical device includes red, green, and blue sub pixels and red, green, and blue data lines connected to the corresponding sub pixels. Red, green, and blue sampling switches are provided in a peripheral region and are electrically connected to data lines of the corresponding color. The green sampling switch is located at a position that is closer to the pixel region than are the red or blue sampling switches.Type: GrantFiled: February 13, 2009Date of Patent: September 18, 2012Assignee: Seiko Epson CorporationInventor: Junichi Masui
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Patent number: 8207925Abstract: An electro-optical device includes three data lines intersecting a scanning line. Three sampling circuits are aligned in a different direction than the direction in which three (R, G, B) sub pixel units are aligned. An image signal line of one sampling circuit extends across the gate electrode of a transistor in another one of the sampling circuits.Type: GrantFiled: May 22, 2009Date of Patent: June 26, 2012Assignee: Seiko Epson CorporationInventor: Junichi Masui
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Publication number: 20120126237Abstract: An electro-optical device is provided with a data line which are provided in a pixel region, a pixel electrode formed from a transparent conductive material which is upper layer than the data line, a storage capacitance electrode which is provided in a layer between the pixel electrode and the data line so as to face the pixel electrode via a capacitance insulation film, an additional capacitance which has a first capacitance electrode and a second capacitance electrode which is formed in the same layer as the pixel electrode and the storage capacitance electrode, respectively. The second capacitance electrode is electrically connected to the data line.Type: ApplicationFiled: November 14, 2011Publication date: May 24, 2012Applicant: Seiko Epson CorporationInventor: Junichi Masui
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Publication number: 20120127152Abstract: A circuit includes a first logic circuit section that outputs a signal that could be in an active voltage level depending on a transfer-signal input from a shift register throughout a display period and outputs a signal whose voltage is constant at the active voltage level throughout an off sequence period; an enable signal output section that outputs an enable signal that is pulsed during the display period; and a second logic circuit section that outputs a signal corresponding to a logical product of the output signal of the first logic circuit section and the enable signal. The enable signal output section keeps the voltage of the enable signal constant at the active voltage level throughout the off sequence period.Type: ApplicationFiled: November 18, 2011Publication date: May 24, 2012Applicant: SEIKO EPSON CORPORATIONInventor: Junichi MASUI
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Publication number: 20090289882Abstract: An electro-optical device includes three data lines intersecting a scanning line. Three sampling circuits are aligned in a different direction than the direction in which three (R, G, B) sub pixel units are aligned. An image signal line of one sampling circuit extends across the gate electrode of a transistor in another one of the sampling circuits.Type: ApplicationFiled: May 22, 2009Publication date: November 26, 2009Applicant: Seiko Epson CorporationInventor: Junichi MASUI
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Publication number: 20090213054Abstract: An electro-optical device includes red, green, and blue sub pixels and red, green, and blue data lines connected to the corresponding sub pixels. Red, green, and blue sampling switches are provided in a peripheral region and are electrically connected to data lines of the corresponding color. The green sampling switch is located at a position that is closer to the pixel region than are the red or blue sampling switches.Type: ApplicationFiled: February 13, 2009Publication date: August 27, 2009Applicant: Seiko Epson CorporationInventor: Junichi Masui