Abstract: An insulating film formed on a base region is patterned to form emitter contact holes and base contact holes arranged alternately in such a manner that those contact holes are short in the center portion and become longer toward the peripheral portions, and to form emitter regions which are aligned with the emitter contact holes. This structure can suppress the current concentration on the center portion of a transistor without using a ballast resistor, thus ensuring a high-output operation, and can improve the transfer gain. The elimination of such a ballast resistor results in an increased effective utilization area and a simplified fabrication.

Abstract: A semiconductor device containing a first electrode formed under an interlayer insulator film and a second electrode formed on or over the interlayer insulator film. The first electrode is connected to an active region formed at a semiconductor substrate. The second electrode acts as a bonding pad and is connected to the first electrode through the interlayer insulator film. Between the second electrode and the substrate, there is a capacitance-reduction structure composed of an insulator layer having a plurality of hollow spaces arranged at intervals. Due to the capacitance-reduction structure, the dielectric material existing between the second electrode and the substrate contains the hollow spaces therein, resulting in a reduced parasitic capacitance produced using the second electrode, substrate and the dielectric material.