Patents by Inventor Junichi Morinaga

Junichi Morinaga has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10330994
    Abstract: A drain electrode 25 of a TFT 21 overlaps with a gate electrode formed integrally with a gate line 23. A pixel electrode 22 has a main body part formed on a first side of the gate line 23, and an extension part extending in an extending direction of a data line 24 and covering an overlapping portion of the gate electrode and the drain electrode 25. The drain electrode 25 is not formed on a second side of the gate line 23, whereas the extension part of the pixel electrode 22 is formed also on the second side of the gate line 23. Even when a position of the pixel electrode 22 is shifted in the extending direction of the data line 24, a parasitic capacitance between a drain and a source of the TFT 21 is kept constant, because an area of a portion where the extension part of the pixel electrode 22 overlaps with the gate line 23 does not change. With this, degradation of display quality due to a variation in the parasitic capacitance between the gate and drain of the TFT 21 can be prevented.
    Type: Grant
    Filed: May 27, 2016
    Date of Patent: June 25, 2019
    Assignee: SHARP KABUSHIKI KAISHA
    Inventors: Masahiro Yoshida, Masakatsu Tominaga, Tomoo Furukawa, Junichi Morinaga
  • Publication number: 20190146269
    Abstract: A color filter substrate includes a light transmissive substrate, a light blocking layer, a light transmissive layer, and a color layer. The light blocking layer is formed on the light transmissive substrate. The light transmissive layer is formed along an edge of the light blocking layer on the light transmissive substrate. The color layer passes rays of visible light and is tinted a predefined color so that the rays passing therethrough exhibit a predefined color. The color layer includes a section disposed on a top surface of the light transmissive substrate in a blank area and an edge section extending from the section in the blank area over the light transmissive layer and a section of the light blocking layer. A thickness of a section of the light transmissive layer on a blank area side is less than a thickness of the light blocking layer.
    Type: Application
    Filed: November 15, 2018
    Publication date: May 16, 2019
    Inventors: KATSUHIRO MIKUMO, JUNICHI MORINAGA, HIKARU YOSHINO
  • Publication number: 20190033636
    Abstract: A liquid crystal display panel (100) according to the present invention includes a plurality of spacers configured to hold a gap between a first substrate (10) and a second substrate (30). The plurality of spacers include a plurality of first spacers in a display region and a plurality of second spacers (55) in a non-display region. The first substrate includes a first metal layer (12) and a second metal layer (16), a first transparent conductive layer (22) formed on the second metal layer and in direct contact with the second metal layer, a second inorganic insulating layer (23) formed on the first transparent conductive layer, and an organic insulating layer (25) formed on the second inorganic insulating layer. When viewed from the normal direction of the first substrate, each of the plurality of spacers overlaps with the first transparent conductive layer and the second inorganic insulating layer, and overlaps with the first metal layer and/or the second metal layer.
    Type: Application
    Filed: January 13, 2017
    Publication date: January 31, 2019
    Inventors: JUNICHI MORINAGA, MASAHIRO YOSHIDA, HIDENOBU KIMOTO, TAKEHIKO KAWAMURA
  • Publication number: 20190004357
    Abstract: A liquid crystal display panel includes: a first substrate; a second substrate; a liquid crystal layer provided between the first substrate and the second substrate; and a plurality of spacers configured to hold a gap between the first substrate and the second substrate. The first substrate includes: a plurality of TFTs; a plurality of first wiring lines including part of a first metal layer; a plurality of second wiring lines including part of a second metal layer; an inorganic insulating layer formed on the second metal layer; a first transparent conductive layer formed below the inorganic insulating layer; a second transparent conductive layer formed on the inorganic insulating layer; and an organic insulating layer formed on the inorganic insulating layer. Each of the plurality of spacers overlaps with at least one of a source electrode and a drain electrode of a corresponding one of the plurality of TFTs, and each of the plurality of spacers includes a part of the organic insulating layer.
    Type: Application
    Filed: January 13, 2017
    Publication date: January 3, 2019
    Inventors: JUNICHI MORINAGA, HIDENOBU KIMOTO, MASAHIRO YOSHIDA, TAKEHIKO KAWAMURA
  • Publication number: 20180173063
    Abstract: A drain electrode 25 of a TFT 21 overlaps with a gate electrode formed integrally with a gate line 23. A pixel electrode 22 has a main body part formed on a first side of the gate line 23, and an extension part extending in an extending direction of a data line 24 and covering an overlapping portion of the gate electrode and the drain electrode 25. The drain electrode 25 is not formed on a second side of the gate line 23, whereas the extension part of the pixel electrode 22 is formed also on the second side of the gate line 23. Even when a position of the pixel electrode 22 is shifted in the extending direction of the data line 24, a parasitic capacitance between a drain and a source of the TFT 21 is kept constant, because an area of a portion where the extension part of the pixel electrode 22 overlaps with the gate line 23 does not change. With this, degradation of display quality due to a variation in the parasitic capacitance between the gate and drain of the TFT 21 can be prevented.
    Type: Application
    Filed: May 27, 2016
    Publication date: June 21, 2018
    Inventors: MASAHIRO YOSHIDA, MASAKATSU TOMINAGA, TOMOO FURUKAWA, JUNICHI MORINAGA
  • Patent number: 9726953
    Abstract: A TFT substrate (10) includes a substrate (10a); a TFT (11) supported by the substrate; a scanning line (12); a signal line (13); a first interlayer insulating layer (15) provided so as to cover the TFT; a pixel electrode (16) electrically connected to a drain electrode (11d) of the TFT; and a transparent storage capacitor electrode (17) provided so as to overlap at least a part of the pixel electrode. At least the first interlayer insulating layer has a contact hole (CH) formed therein through which the pixel electrode is electrically connected to the drain electrode. The scanning line includes a first area (R1) in which the scanning line is branched into two branched lines (12a). The contact hole is located between the two branched lines.
    Type: Grant
    Filed: March 15, 2013
    Date of Patent: August 8, 2017
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Tomoo Furukawa, Kuniko Maeno, Junichi Morinaga, Masakatsu Tominaga, Katsuya Ogawa
  • Publication number: 20170219899
    Abstract: An active matrix substrate for a liquid crystal panel of an FFS mode includes gate lines, data lines, pixel circuits each including a switching element and a pixel electrode, a protective insulating film formed in a layer over these elements, and a common electrode 30 formed in a layer over the protective insulating film. The common electrode 30 has slits 31 corresponding to the pixel electrode, for generating a lateral electric field to be applied to a liquid crystal layer. In the common electrode 30, a cutout above data line 32 having a portion extending in the same direction as that of the data line is formed in a region including a part of a placement region for the data line. On a counter substrate, a black matrix is formed in a position that faces a region including placement regions for the gate line, the data line, the switching element, and the cutout above data line 32. This reduces display failure caused by a load of the data line.
    Type: Application
    Filed: June 24, 2015
    Publication date: August 3, 2017
    Inventors: Tomoo FURUKAWA, Junichi MORINAGA, Masakatsu TOMINAGA, Hidenobu KIMOTO, Yoshihiro SEGUCHI
  • Patent number: 9523900
    Abstract: A liquid crystal display device includes a first substrate, a second substrate, a liquid crystal layer, and a columnar spacer. The first substrate includes a pixel electrode, a TFT, and an interlayer insulating layer. The second substrate includes first, second and third color filters arranged in a delta arrangement. Each pixel has a substantially polygonal shape with n vertices (where n is an integer and n?8) or a substantially circular shape. The TFT and the columnar spacer are arranged in a first tricolor boundary region. A contact hole cut through the interlayer insulating layer is arranged in a second tricolor boundary region. Two of three pixels that define the first tricolor boundary region also define the second tricolor boundary region, but the remaining pixel is arranged at a different location.
    Type: Grant
    Filed: July 17, 2013
    Date of Patent: December 20, 2016
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Junichi Morinaga, Kuniko Maeno, Masayuki Yamanaka
  • Patent number: 9405160
    Abstract: An active matrix substrate includes a plurality of pixel electrodes arranged in a matrix; and a source wiring running in a column direction, wherein the source wiring includes a first side portion running along one side in a column direction of at least one pixel electrode of the plurality of pixel electrodes, a crossing portion running across the pixel electrode, and a second side portion running along another side in the column direction of the pixel electrode, the first side portion and the second side portion are connected to each other via the crossing portion, and at least one crossing portion is provided on each of at least two pixel electrodes aligned in the column direction out of the plurality of pixel electrodes.
    Type: Grant
    Filed: January 25, 2011
    Date of Patent: August 2, 2016
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Hironobu Sawada, Junichi Morinaga, Kuniko Maeno, Katsushige Asada, Katsuhiro Mikumo, Tetsuya Fujikawa
  • Patent number: 9280025
    Abstract: An active matrix substrate (5) is provided with: a plurality of source wiring lines (S) and a plurality of gate wiring lines (G) which are arranged in a matrix; and pixels (P) having thin film transistors (25) disposed in the vicinity of the intersections of the source wiring lines (S) and the gate wiring lines (G), and pixel electrodes (26) connected to the thin film transistors (25). In the active matrix substrate (5), a base material (5a) is disposed in such a manner that the source wiring lines (S) and the gate wiring lines (G) intersect each other, and on the base material (5a), auxiliary capacity electrodes (28), which are provided on the pixel basis, are made of transparent electrodes, and generate an auxiliary capacity, and auxiliary capacity wiring lines (29), which are connected to the auxiliary capacity electrodes (28) and are made of an aluminum alloy, are provided.
    Type: Grant
    Filed: November 13, 2009
    Date of Patent: March 8, 2016
    Assignee: UNIFIED INNOVATIVE TECHNOLOGY, LLC
    Inventors: Hijiri Nakahara, Yukihiro Hotta, Kohichi Tanijiri, Junichi Morinaga
  • Patent number: 9268183
    Abstract: At least either a first substrate or a second substrate has regions corresponding to subpixels (15a, 15b, 15c) and provided with ribs (100a) for controlling how a liquid crystal material is aligned. Scanning signal lines (32) and picture element electrodes (60) are overlapped with each other via an insulating material as seen in plan view. The ribs (100a) and the scanning signal lines (32) are at least partially overlapped with each other as seen in plan view.
    Type: Grant
    Filed: December 3, 2008
    Date of Patent: February 23, 2016
    Assignee: SHARP KABUSHIKI KAISHA
    Inventors: Katsushige Asada, Masahiro Yoshida, Masakatsu Tominaga, Tetsuya Fujikawa, Junichi Morinaga, Toshiaki Fujihara
  • Publication number: 20150192834
    Abstract: This liquid crystal display device (100) includes a first substrate (10), a second substrate (20), a liquid crystal layer (30), and a columnar spacer (40). The first substrate includes a pixel electrode (11), a TFT (12), and an interlayer insulating layer (13). The second substrate (20) includes first, second and third color filters (22R, 22G and 22B) arranged in a delta arrangement. Each pixel has a substantially polygonal shape with n vertices (where n is an integer and n?8) or a substantially circular shape. The TFT and the columnar spacer are arranged in a first tricolor boundary region (r3a). A contact hole (13a) cut through the interlayer insulating layer is arranged in a second tricolor boundary region (r3b).
    Type: Application
    Filed: July 17, 2013
    Publication date: July 9, 2015
    Inventors: Junichi Morinaga, Kuniko Maeno, Masayuki Yamanaka
  • Publication number: 20150138475
    Abstract: This array substrate is provided with: a plurality of switching elements which are provided on a substrate; a plurality of source lines which are provided so as to extend parallel to each other and are connected to the source electrodes of the switching elements; a first interlayer insulating film which covers the source lines; a transparent electrode which is provided on the first interlayer insulating film; a second interlayer insulating film which covers the transparent electrode; and a plurality of pixel electrodes which are provided on the second interlayer insulating film so as to overlap the transparent electrode and constitute auxiliary capacitors, and which are connected to drain electrodes of the switching elements. The transparent electrode is provided with incisions at positions overlapping the source lines.
    Type: Application
    Filed: April 26, 2013
    Publication date: May 21, 2015
    Applicant: Sharp Kabushiki Kaisha
    Inventors: Yasuhiro Kohara, Hijiri Nakahara, Junichi Morinaga
  • Patent number: 9001294
    Abstract: A liquid crystal display panel includes a color filter substrate with four or more color layers of different colors and a light shielding layer, each pixel including a repeating unit composed of the four or more color layers overlap overlapping the light shielding layer, the liquid crystal display panel having a region where color layers of the same color in different pixels are arranged in the same rows or the same columns, and a color layer of a color with higher brightness overlaps a portion of the light shielding layer positioned between the color layer and another color layer of the same color with an overlapping width smaller than that with which a color layer of a color with lower brightness overlaps a portion of the light shielding layer positioned between the color layer and another color layer of the same color.
    Type: Grant
    Filed: November 1, 2011
    Date of Patent: April 7, 2015
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Ryohki Itoh, Yuhko Hisada, Junichi Morinaga, Hironobu Sawada, Katsushige Asada
  • Publication number: 20150062523
    Abstract: A TFT substrate (10) includes a substrate (10a); a TFT (11) supported by the substrate; a scanning line (12); a signal line (13); a first interlayer insulating layer (15) provided so as to cover the TFT; a pixel electrode (16) electrically connected to a drain electrode (11d) of the TFT; and a transparent storage capacitor electrode (17) provided so as to overlap at least a part of the pixel electrode. At least the first interlayer insulating layer has a contact hole (CH) formed therein through which the pixel electrode is electrically connected to the drain electrode. The scanning line includes a first area (R1) in which the scanning line is branched into two branched lines (12a). The contact hole is located between the two branched lines.
    Type: Application
    Filed: March 15, 2013
    Publication date: March 5, 2015
    Inventors: Tomoo Furukawa, Kuniko Maeno, Junichi Morinaga, Masakatsu Tominaga, Katsuya Ogawa
  • Publication number: 20140347614
    Abstract: This liquid crystal display device (100) includes: a first substrate (10) including a pixel electrode (11); a second substrate (20) including a counter electrode (21); and a vertical alignment liquid crystal layer (30). At least one liquid crystal domain with axisymmetric alignment is produced when a voltage is applied between the pixel electrode and the counter electrode in each pixel. The second substrate further includes an alignment controlling projection which induces liquid crystal molecules (31) in the liquid crystal domain to get aligned axisymmetrically and a plurality of columnar spacers (24), which includes a first columnar spacer (24m) and a second columnar spacer (24s) which is lower than the first columnar spacer. The pixel electrode has a length of 35 ?m or less as measured along its shorter sides. In at least some of the pixels, the second columnar spacer functions as the alignment controlling projection.
    Type: Application
    Filed: January 11, 2013
    Publication date: November 27, 2014
    Inventors: Katsushige Asada, Manabu Sawasaki, Junichi Morinaga, Masayuki Yamanaka
  • Patent number: 8743305
    Abstract: A liquid crystal display device in which lengths (d1 and1 d2) of respective picture element electrodes (60) in an extended direction of scanning signal lines (32) are longer than lengths (d3) of the respective picture element electrodes (60) in an extended direction of video signal lines (35) is arranged such that storage capacitor lines (36) are provided along the respective scanning signal lines (32) so as to overlap the respective picture element electrodes (60) via an insulating film (70) in plan view.
    Type: Grant
    Filed: December 1, 2008
    Date of Patent: June 3, 2014
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Masahiro Yoshida, Satoshi Horiuchi, Masakatsu Tominaga, Junichi Morinaga, Ryohki Itoh, Katsushige Asada, Hironobu Sawada, Hitoshi Matsumoto
  • Publication number: 20130222746
    Abstract: The present invention relates to a liquid crystal display panel which can prevents roughness of the displayed image and reduction in the contrast ratio accompanying a use of four or more color filters of different colors.
    Type: Application
    Filed: November 1, 2011
    Publication date: August 29, 2013
    Applicant: SHARP KABUSHIKI KAISHA
    Inventors: Ryohki Itoh, Yuhko Hisada, Junichi Morinaga, Hironobu Sawada, Katsushige Asada
  • Publication number: 20130222747
    Abstract: The present invention provides a display panel capable of suppressing display unevenness caused by the capacitance change due to misalignment when four primary colors are used. The display panel of the present invention includes: signal lines; pixel electrodes; and a common electrode. In the display panel, a single pixel is constituted by picture elements of four or more colors. Each of the pixel electrodes is connected to each one of the signal lines. The pixel electrodes, which are included in the single pixel, are arranged in a squared shape, and include a pixel electrode having larger area and a pixel electrode having smaller area. Both of a signal line connected to the pixel electrode having the larger area and a signal line connected to the pixel electrode having the smaller area overlap with the pixel electrode having the larger area.
    Type: Application
    Filed: November 1, 2011
    Publication date: August 29, 2013
    Applicant: SHARP KABUSHIKI KAISHA
    Inventors: Yuhko Hisada, Hironobu Sawada, Junichi Morinaga, Katsushige Asada, Ryohki Itoh
  • Patent number: 8482689
    Abstract: The present invention provides a liquid crystal display device with a high aperture ratio in a pixel region while securing a required storage capacitance.
    Type: Grant
    Filed: July 14, 2009
    Date of Patent: July 9, 2013
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Hijiri Nakahara, Junichi Morinaga