Abstract: A carrier storage layer is located in a region of a predetermined depth from a surface of an N? substrate, a base region is located in a shallower region than the predetermined depth and an emitter region is located in a surface of the N? substrate. The carrier storage layer is formed by phosphorus injected to have a maximum impurity concentration at the predetermined depth, the base region is formed by boron injected to have the maximum impurity concentration at a shallower position than the predetermined depth and the emitter region is formed by arsenic injected to have the maximum impurity concentration at the surface of the N? substrate. An opening is formed to extend through the emitter region, base region and the carrier storage layer. On the inner wall of the opening, a gate electrode is formed with a gate insulating film therebetween.

Abstract: A p-type region is provided on a first n-type region. A second n-type region is provided on the p-type region, spaced apart from the first n-type region by the p-type region. A gate electrode serves to form an n-channel between the first and second n-type regions. A first electrode is electrically connected to each of the p-type region and the second n-type region. A second electrode is provided on the first n-type region such that it is spaced apart from the p-type region by the first n-type region and at least a part thereof is in contact with the first n-type region. The second electrode is made of any of metal and alloy and serves to inject holes into the first n-type region.

Abstract: A carrier storage layer is located in a region of a predetermined depth from a surface of an N? substrate, a base region is located in a shallower region than the predetermined depth and an emitter region is located in a surface of the N? substrate. The carrier storage layer is formed by phosphorus injected to have a maximum impurity concentration at the predetermined depth, the base region is formed by boron injected to have the maximum impurity concentration at a shallower position than the predetermined depth and the emitter region is formed by arsenic injected to have the maximum impurity concentration at the surface of the N? substrate. An opening is formed to extend through the emitter region, base region and the carrier storage layer. On the inner wall of the opening, a gate electrode is formed with a gate insulating film therebetween.