Abstract: A circuit module comprises a substrate module, an electronic component, and a first conductive joining member. The substrate module includes a circuit substrate having an upper main surface and a lower main surface, an insulating member covering the upper main surface of the circuit substrate, an insulating member covering the upper main surface of the circuit substrate, and a first metal pin that passes through the insulating member parallel to a vertical axis and is electrically connected to the circuit substrate. The first metal pin has a first exposed portion. The first exposed portion is exposed from the insulating member to face a right direction. A first outer electrode has a left projecting portion projecting in a left direction from the left surface. A first conductive joining member joins the first exposed portion and the left projecting portion to each other.

Abstract: The stability of a step of processing a wiring formed using copper, aluminum, gold, silver, molybdenum, or the like is increased. Moreover, the concentration of impurities in a semiconductor film is reduced. Moreover, the electrical characteristics of a semiconductor device are improved. In a transistor including an oxide semiconductor film, an oxide film in contact with the oxide semiconductor film, and a pair of conductive films being in contact with the oxide film and including copper, aluminum, gold, silver, molybdenum, or the like, the oxide film has a plurality of crystal parts and has c-axis alignment in the crystal parts, and the c-axes are aligned in a direction parallel to a normal vector of a top surface of the oxide semiconductor film or the oxide film.

Abstract: A power semiconductor module includes a semiconductor switching element, a gate control pattern to which a gate electrode of the semiconductor switching element is connected, a source control pattern to which a source electrode of the semiconductor switching element is connected, a capacitor to form a low-pass filter, a capacitor arrangement pattern to which one end of the capacitor is connected, and a wire. The other end of the capacitor is connected to the source control pattern. The wire electrically connects the capacitor arrangement pattern and the gate control pattern.

Abstract: A power conversion apparatus includes a hermetic housing, a power semiconductor module, and dry gas. The hermetic housing includes a gas inlet valve and a gas outlet valve. The power semiconductor module is arranged in an internal space in the hermetic housing. The internal space in the hermetic housing is filled with dry gas.

Abstract: A semiconductor drive device includes a drive circuit that drives a semiconductor switching element, a passive element connected to a gate of the semiconductor switching element to prevent a gate current of the semiconductor switching element, a switching element connected in series to the passive element, a control circuit that controls the switching element, and a temperature detection circuit that detects a temperature of the semiconductor switching element. The control circuit controls the switching element such that when the temperature detected by the temperature detection circuit is high, the gate current is prevented more than when the temperature is low.

Abstract: This temperature detection circuit includes: a temperature sensor having a resistance value that changes according to a change in temperature; an AC power supply that supplies AC power to the temperature sensor; a resonance circuit connected to the temperature sensor, the resonance circuit having an impedance that has an extreme value when AC power having a resonance frequency is supplied; and a voltage detection circuit that detects a voltage applied to any of a plurality of elements connected to the AC power supply. The resonance frequency in the resonance circuit and the frequency of the AC power are set to coincide with each other.

Abstract: An object is to provide a technique capable of enhancing electrical characteristics and reliability of a semiconductor device. The semiconductor device includes a plurality of semiconductor chips, a plurality of electrodes each being electrically connected to each of the plurality of semiconductor chips, a sealing member, and a joint part. The sealing member covers the plurality of semiconductor chips, and parts being connected to the plurality of semiconductor chips, of the plurality of electrodes. The joint part is disposed outside the sealing member to electrically connect parts which are not covered by the sealing member, of the plurality of electrodes.

Abstract: A power semiconductor module includes a semiconductor switching element, a gate control pattern to which a gate electrode of the semiconductor switching element is connected, a source control pattern to which a source electrode of the semiconductor switching element is connected, a capacitor to form a low-pass filter, a capacitor arrangement pattern to which one end of the capacitor is connected, and a wire. The other end of the capacitor is connected to the source control pattern. The wire electrically connects the capacitor arrangement pattern and the gate control pattern.

Abstract: An emitter interconnection connecting the emitter of a semiconductor switching element to a negative electrode is different in one or both of length and width from an emitter interconnection connecting the emitter of a semiconductor switching element to the negative electrode. At the time of switching, an induced electromotive force is generated at a gate control wire, or at a gate pattern, or at an emitter wire, by at least one of a current flowing through a positive electrode and a current flowing through the negative electrode, so as to reduce the difference between the emitter potential of the semiconductor switching element and the emitter potential of the semiconductor switching element caused by the difference.

Abstract: To provide a technique of reducing gate oscillation while suppressing reduction in switching speed. A semiconductor device according to the technique disclosed in the present description includes: a first gate electrode in an active region; a gate pad in a first region different from the active region in a plan view; and a first gate line electrically connecting the first gate electrode and the gate pad to each other. The first gate line is formed into a spiral shape. The first gate line is made of a different type of material from the first gate electrode.

Abstract: Gates of a plurality of semiconductor switching elements are electrically connected to a common gate control pattern by gate wires. Sources of the plurality of semiconductor switching elements are electrically connected to a common source control pattern by source wires. The gate control pattern is disposed to interpose the source control pattern between the gate control pattern and each of the plurality of semiconductor switching elements that are connected in parallel and that operate in parallel. Hence, each of the gate wires becomes longer than each of the source wires, and has an inductance larger than the source wire. Accordingly, gate oscillation is reduced or suppressed in the plurality of semiconductor switching elements that are connected in parallel and that operate in parallel.

Abstract: An emitter interconnection connecting the emitter of a semiconductor switching element to a negative electrode is different in one or both of length and width from an emitter interconnection connecting the emitter of a semiconductor switching element to the negative electrode. At the time of switching, an induced electromotive force is generated at a gate control wire, or at a gate pattern, or at an emitter wire, by at least one of a current flowing through a positive electrode and a current flowing through the negative electrode, so as to reduce the difference between the emitter potential of the semiconductor switching element and the emitter potential of the semiconductor switching element caused by the difference.

Abstract: Gates of semiconductor switching elements are connected to a gate control wiring pattern. The gate control wiring pattern is further connected to a gate control terminal and a filter terminal which are connected by an element for forming a filter outside a housing. The filter terminal and the gate control terminal are connected to the gate control wiring pattern in such a manner that a section electrically connecting the filter terminal and the gate control terminal overlaps with at least a part of a section electrically connecting the gates of the semiconductor switching elements on the gate control wiring pattern.

Abstract: Gates of a plurality of semiconductor switching elements are electrically connected to a common gate control pattern by gate wires. Sources of the plurality of semiconductor switching elements are electrically connected to a common source control pattern by source wires. The gate control pattern is disposed to interpose the source control pattern between the gate control pattern and each of the plurality of semiconductor switching elements that are connected in parallel and that operate in parallel. Hence, each of the gate wires becomes longer than each of the source wires, and has an inductance larger than the source wire. Accordingly, gate oscillation is reduced or suppressed in the plurality of semiconductor switching elements that are connected in parallel and that operate in parallel.

Abstract: Gates of semiconductor switching elements are connected to a gate control wiring pattern. The gate control wiring pattern is further connected to a gate control terminal and a filter terminal which are connected by an element for forming a filter outside a housing. The filter terminal and the gate control terminal are connected to the gate control wiring pattern in such a manner that a section electrically connecting the filter terminal and the gate control terminal overlaps with at least a part of a section electrically connecting the gates of the semiconductor switching elements on the gate control wiring pattern.

Abstract: An object is to provide a technique capable of enhancing electrical characteristics and reliability of a semiconductor device. The semiconductor device includes a plurality of semiconductor chips, a plurality of electrodes each being electrically connected to each of the plurality of semiconductor chips, a sealing member, and a joint part. The sealing member covers the plurality of semiconductor chips, and parts being connected to the plurality of semiconductor chips, of the plurality of electrodes. The joint part is disposed outside the sealing member to electrically connect parts which are not covered by the sealing member, of the plurality of electrodes.

Abstract: A power semiconductor module includes: a positive arm and a negative arm that are formed by series connection of self-arc-extinguishing type semiconductor elements and that are connected at a connection point between the self-arc-extinguishing type semiconductor elements; a positive-side DC electrode, a negative-side DC electrode, and an AC electrode that are connected to the positive arm and the negative arm; and a substrate on which a wiring pattern is formed, the wiring pattern connecting the self-arc-extinguishing type semiconductor elements of the positive arm and the negative arm to the positive-side DC electrode, the negative-side DC electrode and the AC electrode. The positive-side DC electrode, the negative-side DC electrode, and the AC electrode are insulated from one another and arranged such that one of the electrodes faces each of the other two electrodes.

Abstract: A power semiconductor module includes: a positive arm and a negative arm that are formed by series connection of self-arc-extinguishing type semiconductor elements, the positive arm and the negative arm being connected at a series connection point between the self-arc-extinguishing type semiconductor elements; a positive-side electrode, a negative-side electrode, and an AC electrode connected to the positive arm and the negative arm; and a substrate on which a plurality of wiring patterns are formed, the wiring patterns connecting the self-arc-extinguishing type semiconductor elements of the positive arm and the negative arm to the positive-side electrode, the negative-side electrode, and the AC electrode. Respective directions of current flowing in adjacent wiring patterns are identical to each other, and one of the adjacent wiring patterns is arranged in mirror symmetry with the other of the adjacent wiring patterns.

Abstract: A power semiconductor module includes: a positive arm and a negative arm that are formed by series connection of self-arc-extinguishing type semiconductor elements and that are connected at a connection point between the self-arc-extinguishing type semiconductor elements; a positive-side DC electrode, a negative-side DC electrode, and an AC electrode that are connected to the positive arm and the negative arm; and a substrate on which a wiring pattern is formed, the wiring pattern connecting the self-arc-extinguishing type semiconductor elements of the positive arm and the negative arm to the positive-side DC electrode, the negative-side DC electrode and the AC electrode. The positive-side DC electrode, the negative-side DC electrode, and the AC electrode are insulated from one another and arranged such that one of the electrodes faces each of the other two electrodes.

Abstract: A power semiconductor module includes: a positive arm and a negative arm that are formed by series connection of self-arc-extinguishing type semiconductor elements, the positive arm and the negative arm being connected at a series connection point between the self-arc-extinguishing type semiconductor elements; a positive-side electrode, a negative-side electrode, and an AC electrode connected to the positive arm and the negative arm; and a substrate on which a plurality of wiring patterns are formed, the wiring patterns connecting the self-arc-extinguishing type semiconductor elements of the positive arm and the negative arm to the positive-side electrode, the negative-side electrode, and the AC electrode. Respective directions of current flowing in adjacent wiring patterns are identical to each other, and one of the adjacent wiring patterns is arranged in mirror symmetry with the other of the adjacent wiring patterns.