Patents by Inventor Junichi Onodera
Junichi Onodera has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240087858Abstract: A cleaning method according to the present disclosure includes a first cleaning operation and a second cleaning operation, wherein the first cleaning operation includes: supplying a first processing gas to the interior of the chamber; and cleaning a region including the placement region of the stage by generating a first plasma from the first processing gas in a space defined by the placement region and the electrode, and the second cleaning operation includes: holding a dummy substrate at a predetermined position spaced by a predetermined distance from the placement region to face the placement region; supplying a second processing gas to the interior of the chamber; and cleaning a region including a periphery of the placement region of the stage by generating a second plasma from the second processing gas in a space defined by the dummy substrate held at the predetermined position and the electrode.Type: ApplicationFiled: November 24, 2023Publication date: March 14, 2024Applicant: Tokyo Electron LimitedInventors: Junichi SASAKI, Yubin YEO, Yuki ONODERA, Takamitsu TAKAYAMA
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Patent number: 9033248Abstract: According to one embodiment, a semiconductor storage device is provided with a memory chip including a storage circuit, a controller chip that controls a memory chip, and a substrate having a first surface and a second surface opposing one another, on the first surface of which the controller chip is mounted. Further, the semiconductor storage device is provided with an external connection terminal formed on the second surface of the substrate, and resin that encapsulates the memory chip, the controller chip, and the substrate, includes a third surface and a fourth surface opposing one another, and has a predetermined mark directly printed only on the fourth surface that is adjacent to the second surface of the substrate.Type: GrantFiled: July 20, 2012Date of Patent: May 19, 2015Assignee: KABUSHIKI KAISHA TOSHIBAInventors: Hidetoshi Suzuki, Yuichi Hotta, Yuji Shimoda, Yuuji Ogawa, Taku Nishiyama, Tadanobu Okubo, Junichi Onodera, Takeshi Ikuta, Naohisa Okumura, Katsuyoshi Watanabe, Kazuhide Doi
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Publication number: 20130186960Abstract: According to one embodiment, a semiconductor storage device is provided with a memory chip including a storage circuit, a controller chip that controls a memory chip, and a substrate having a first surface and a second surface opposing one another, on the first surface of which the controller chip is mounted. Further, the semiconductor storage device is provided with an external connection terminal formed on the second surface of the substrate, and resin that encapsulates the memory chip, the controller chip, and the substrate, includes a third surface and a fourth surface opposing one another, and has a predetermined mark directly printed only on the fourth surface that is adjacent to the second surface of the substrate.Type: ApplicationFiled: July 20, 2012Publication date: July 25, 2013Inventors: Hidetoshi SUZUKI, Yuichi Hotta, Yuji Shimoda, Yuuji Ogawa, Taku Nishiyama, Tadanobu Okubo, Junichi Onodera, Takeshi Ikuta, Naohisa Okumura, Katsuyoshi Watanabe, Kazuhide Doi
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Patent number: 7382415Abstract: The object of the present invention is to provide a color correction process designed for enabling all the hues in the image properly corrected without leaving any uncorrected range; the inputted image data represented by the combination of 3 color signals is divided into a plurality of ranges by the hue so that color correction can be made by the range of each hue; in the color correction processing circuit by each hue, in order for the peripheral area of the range set for color correction to be prevented from being left uncorrected, the color correction process is designed so that correction ranges peripherally overlap with one another.Type: GrantFiled: November 12, 2004Date of Patent: June 3, 2008Assignee: Fujitsu General LimitedInventors: Shuji Kiyama, Masayuki Bannai, Masakazu Fukuchi, Junichi Onodera
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Patent number: 7322701Abstract: To provide a projector having a configuration for reflecting correction by lens shift on keystone correction and preferentially using a lens shift function.Type: GrantFiled: September 2, 2005Date of Patent: January 29, 2008Assignee: Fujitsu General LimitedInventors: Takashi Kamimura, Takehito Hiyoshi, Junichi Onodera
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Patent number: 7321401Abstract: A contour emphasizing circuit which comprises a contour pick-up unit 10 for picking up a contour component HE from an input luminance signal Y, a level judging unit 15 for judging the luminance level of the input luminance signal Y, a coefficient control unit 17 for changing the coefficient in a plurality of steps depending upon a judgment signal and multiplying the contour component HE by the coefficient to output the product, and an adder 14 for adding the contour component outputted from the coefficient control unit 17 to the input luminance signal Y to output an emphasized-contour luminance signal. The coefficient to be multiplied by the contour component HE is changed in a plurality of steps depending upon the luminance level of the input luminance signal Y, and the contour component HE to be added to the input luminance signal Y is controlled to have a magnitude appropriate to the luminance level of the input luminance signal Y.Type: GrantFiled: February 22, 2005Date of Patent: January 22, 2008Assignee: Fujitsu General LimitedInventors: Toru Aida, Seiji Matsunaga, Junichi Onodera
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Patent number: 7092032Abstract: A scanning conversion circuit which interpolates an image signal of an interpolation scanning line from an input image signal Vi of a scanning line adjacent to the upside or downside of an interpolation scanning line to output an image signal Vp doubled in scanning line, and which comprises a directivity detection unit (50) for detecting, in order to prevent an unnatural view of a slant line when a moving image is displayed with an image signal Vp, a direction having the strongest correlation out of a plurality of directions, including a vertical direction and a slant direction, centering on an interpolation point of an interpolation scanning line based on the signal Vi, and an average value computing unit (56) for computing an average value of image signals at two sampling points corresponding to the detected direction out of a plurality of sampling points in an upside scanning line and downside scanning line.Type: GrantFiled: September 22, 2000Date of Patent: August 15, 2006Assignee: Fujitsu General LimitedInventors: Seiji Matsunaga, Junichi Onodera, Makoto Ikeda
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Patent number: 7039299Abstract: A support for receiving an HDD main body installed in an apparatus main body of an AV server. An HDD unit formed by attaching, to peripheries of the HDD main body, a frame having at least a gripping portion and a latch. The support has a plurality of slots which are formed vertically at opposing positions inside of both sides in a parallel state at regular intervals, and a latching portion at an upper edge in a lateral direction. Vents are provided between the slots, and a guide member having a groove portion is disposed in each slot. The HDD unit is inserted into a slot with the frame being guided into the groove portion of the guide member. The latch of the frame is engaged with a latching portion of the support so that each HDD unit is locked independently.Type: GrantFiled: June 9, 2004Date of Patent: May 2, 2006Assignee: Sony CorporationInventor: Junichi Onodera
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Patent number: 7031594Abstract: A data recording and/or reproducing apparatus having actuating buttons or adjustment volumes which enable a wide variety of processing operations despite a limited operating space, and which is able to display levels of plural audio data or to display various other data on a limited display area without detracting from viewability. To this end, the apparatus recording and/or reproducing includes a unit for recording and/or reproducing data for a non-linear accessible recording medium, at least one input port and at least one output port. The input port and the output port time-divisionally access the recording and/or reproducing unit to process the data inputted to the input port to output the processed data to the recording and/or reproducing a unit. The data reproduced from the recording and/or reproducing unit is processed by and outputted from the output port.Type: GrantFiled: October 8, 2003Date of Patent: April 18, 2006Assignee: Sony CorporationInventors: Shinichi Morishima, Makoto Tabuchi, Masakazu Murata, Kazuo Kamiyama, Toru Eto, Junichi Onodera
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Publication number: 20060050244Abstract: To provide a projector having a configuration for reflecting correction by lens shift on keystone correction and preferentially using a lens shift function.Type: ApplicationFiled: September 2, 2005Publication date: March 9, 2006Inventors: Takashi Kamimura, Takehito Hiyoshi, Junichi Onodera
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Publication number: 20050190301Abstract: A contour emphasizing circuit which comprises a contour pick-up unit 10 for picking up a contour component HE from an input luminance signal Y, a level judging unit 15 for judging the luminance level of the input luminance signal Y, a coefficient control unit 17 for changing the coefficient in a plurality of steps depending upon a judgment signal and multiplying the contour component HE by the coefficient to output the product, and an adder 14 for adding the contour component outputted from the coefficient control unit 17 to the input luminance signal Y to output an emphasized-contour luminance signal. The coefficient to be multiplied by the contour component HE is changed in a plurality of steps depending upon the luminance level of the input luminance signal Y, and the contour component HE to be added to the input luminance signal Y is controlled to have a magnitude appropriate to the luminance level of the input luminance signal Y.Type: ApplicationFiled: February 22, 2005Publication date: September 1, 2005Inventors: Toru Aida, Seiji Matsunaga, Junichi Onodera
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Publication number: 20050104895Abstract: The object of the present invention is to provide a color correction process designed for enabling all the hues in the image properly corrected without leaving any uncorrected range; the inputted image data represented by the combination of 3 color signals is divided into a plurality of ranges by the hue so that color correction can be made by the range of each hue; in the color correction processing circuit by each hue, in order for the peripheral area of the range set for color correction to be prevented from being left uncorrected, the color correction process is designed so that correction ranges peripherally overlap with one another.Type: ApplicationFiled: November 12, 2004Publication date: May 19, 2005Inventors: Shuji Kiyama, Masayuki Bannai, Masakazu Fukuchi, Junichi Onodera
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Publication number: 20050018502Abstract: A data recording and/or reproducing apparatus having actuating buttons or adjustment volumes which enable a wide variety of processing operations despite a limited operating space, and which is able to display levels of plural audio data or to display various other data on a limited display area without detracting from viewability. To this end, the apparatus recording and/or reproducing includes a unit for recording and/or reproducing data for a non-linear accessible recording medium, at least one input port and at least one output port. The input port and the output port time-divisionally access the recording and/or reproducing unit to process the data inputted to the input port to output the processed data to the recording and/or reproducing a unit. The data reproduced from the recording and/or reproducing unit is processed by and outputted from the output port.Type: ApplicationFiled: October 8, 2003Publication date: January 27, 2005Inventors: Shinichi Morishima, Makoto Tabuchi, Masakazu Murata, Kazuo Kamiyama, Toru Eto, Junichi Onodera
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Publication number: 20040223748Abstract: A supporting means for receiving an HDD main body to be installed in an apparatus main body of an AV server. An HDD unit formed by attaching, to peripheries of the HDD main body, a frame having at least a gripping portion and a latching means. The supporting means has a plurality of slots which are formed vertically at opposing positions inside of the both sides in a parallel state at regular intervals, and a latching portion at an upper edge in a lateral direction. Vents are provided between said slots, and a guide member having a groove portion is disposed in each slot. The HDD unit is inserted into a slot with the frame being guided into the groove portion of the guide member. The latching means of the frame is engaged with a latching portion of the supporting means so that each HDD unit is locked independently.Type: ApplicationFiled: June 9, 2004Publication date: November 11, 2004Inventor: Junichi Onodera
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Patent number: 6771876Abstract: A data recording and/or reproducing apparatus includes a unit for recording and/or reproducing data for a non-linear accessible recording medium, at least one input port and at least one output port. The input port and the output port time-divisionally access the recording and/or reproducing unit to process the data inputted to the input port to output the processed data to the recording and/or reproducing a unit. The data reproduced from the recording and/or reproducing unit is processed by and outputted from the output port. The apparatus also includes a port actuation button for selecting the input and output ports, an actuation selection button for selecting recording or playback for the input port or the output port as selected by the port actuation button, and a controller for performing control so that the recording operation or the playback operation as selected by the actuation selection button will be executed by the input port or the output port as selected by the port actuation button.Type: GrantFiled: November 9, 1999Date of Patent: August 3, 2004Assignee: Sony CorporationInventors: Shinichi Morishima, Makoto Tabuchi, Masakazu Murata, Kazuo Kamiyama, Toru Eto, Junichi Onodera
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Patent number: 6650792Abstract: An image processor containing an EPROM (38) stored with coefficient data for image enlargement and reduction, coefficient read controllers (40-44) for reading out coefficient data from the EPROM (38) according to an enlargement/reduction selection signal, a variable horizontal characteristic filter (16) for executing either image enlargement or image reduction according to the coefficient data, a variable vertical characteristic filter (18) also for executing either image enlargement or image reduction according to the coefficient data, a frame memory (20), a contour correcting circuit (14), and selectors (22-30). When image enlargement is selected by selectors (22-30), input video signals are processed by the contour correcting circuit (14), the frame memory (20), and the filters (16,18) in this order while, when image reduction is selected, input video signals are processed by the same in the reverse order.Type: GrantFiled: July 6, 2000Date of Patent: November 18, 2003Assignee: Fujitsu General LimitedInventors: Toru Aida, Masamichi Nakajima, Masayuki Kobayashi, Junichi Onodera, Hideyuki Ohmori
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Patent number: 6522366Abstract: A dual-loop PLL circuit is provided with a clamping circuit 12, an A/D conversion circuit 14, a reference color burst outputting circuit 18, a PLL circuit 24, and phase detecting circuit 34. The phase of a reference color burst KK outputted from the circuit 18 is changed at a slice level SL, and the level SL is changed by a reference phase value in the phase detecting circuit 34. The sampling clocks outputted from the PLL circuit 24 to the A/D conversion circuit 14 are converted to a signal of a frequency of 4 Fsc, and the phase of the signal can be changed continuously by using the reference phase value. In addition, since the phase of the sampling clocks can be adjusted to a desired value and the output signal of the A/D conversion circuit 14 can be converted onto a prescribed color difference signal by a signal conversion circuit and outputted, the color difference signals can be demodulated easily with high accuracy.Type: GrantFiled: May 12, 2000Date of Patent: February 18, 2003Assignee: Fujitsu General LimitedInventors: Junichi Onodera, Nobuyuki Takagi, Masamichi Nakajima
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Patent number: 6344839Abstract: In a subfield drive method, two subframes of the least brightness are arranged adjacently to each other to select and light up the display device in terms of the change in image brightness in the time axial direction. When, for example, the level of original signal changes from 7 to 8 or from 8 to 7, SF3, SF2, SF1 and SF1 are selected as subframes for level 8, and SF3, F2 and SF1 are selected as subframes for level 7. This prohibiting any continuous lighting or non-lighting at the levels 7 and 8, there is no substantial change in brightness nor degradation of picture quality at that time. Any distortion of moving image (pseudo contour) is removed by the correction circuit 20 having the frame memory 24 that delays by one frame, the correction constant set circuit 26 that outputs correction data, and the adder 28 that adds the correction data to the original image signal.Type: GrantFiled: October 6, 1997Date of Patent: February 5, 2002Assignee: Fujitsu General LimitedInventors: Hayato Denda, Masamichi Nakajima, Asao Kosakai, Junichi Onodera, Masayuki Kobayashi, Seiji Matsunaga
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Patent number: 6069610Abstract: In an error diffusion processing unit to get a false half tone diffusing in the surroundings the luminance error between the original picture element signal quantizedly input and the preceding data, one dot of said signal is converted into plural picture elements. The respective picture elements (pixels) thus converted are compared with the prior data to detect the luminance error, which will then be weighted by multiplying it with certain coefficient to give, for instance, the reproduced error in one line past, that in one dot past and further the reproduced error a in one-line and one-dot past, which will respectively be added to the original pixels. Producing a false tone by error variance in unit of pixel enables to display the half tone without expanding the half tone display area beyond required dot number.Type: GrantFiled: November 14, 1995Date of Patent: May 30, 2000Assignee: Fujitsu General LimitedInventors: Hayato Denda, Masamichi Nakajima, Asao Kosakai, Junichi Onodera, Masayuki Kobayashi, Seiji Matsunaga
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Patent number: 6061040Abstract: In a display device in which each group of plural drive elements takes charge of the drive of plural picture elements (pixels) and the display luminance changes as the number of sustaining pulses changes that are supplied to a plasma display panel, a constant emission luminance characteristic is maintained by increasing the number of sustaining pulses for a larger load when the display load factor is large, and decreasing the number of sustaining pulses for a smaller load when the display load factor is small. When displaying a multi-tone image by a subfield drive method, a display area detect circuit allows the display of an image with constant luminance characteristic despite the variation of the display load factor, and prevents the deterioration of tone characteristic due to the subfield drive method, and further, a half tone display circuit allows the decrease of the bit number thereby simplifying the configuration of the display area detect circuit.Type: GrantFiled: July 18, 1996Date of Patent: May 9, 2000Assignee: Fujitsu General LimitedInventors: Junichi Onodera, Masamichi Nakajima, Asao Kosakai, Masayuki Kobayashi, Hayato Denda, Seiji Matsunaga, Toru Aida