Abstract: A display device includes a plurality of pixels, a plurality of scanning signal lines, a plurality of data signal lines, a source driver configured to supply a data signal to the plurality of pixels via a corresponding data signal line of the plurality of data signal lines, and a spare wiring line configured to connect to a disconnected data signal line. For each data signal output to a data signal line with disconnection corrected by the spare wiring line, the source driver sets an output delay amount according to a disconnection position and a line position of a pixel to be supplied with the data signal.

Abstract: A display device includes a plurality of pixels, a plurality of scanning signal lines, a plurality of data signal lines, a source driver configured to supply a data signal to the plurality of pixels via a corresponding data signal line of the plurality of data signal lines, and a spare wiring line configured to connect to a disconnected data signal line. For each data signal output to a data signal line with disconnection corrected by the spare wiring line, the source driver sets an output delay amount according to a disconnection position and a line position of a pixel to be supplied with the data signal.

Abstract: A display device according to aspect of the disclosure includes: a source driver; and a timing controller. The source driver and the timing controller perform data communication through serial transmission. The display device further includes a storage unit configured to store information about each of a plurality of standards that are different from each other, the standard defining a protocol for specific serial transmission. The timing controller selects one standard from among the plurality of standards, performs first determination that is determination on the selected standard to determine whether to receive a lock signal from the source driver within a predetermined period after training pattern data compatible with the selected standard is output to the source driver, and outputs an image signal of the protocol of the selected standard to the source driver when a result of the first determination is positive.

Abstract: A display device according to aspect of the disclosure includes: a source driver; and a timing controller. The source driver and the timing controller perform data communication through serial transmission. The display device further includes a storage unit configured to store information about each of a plurality of standards that are different from each other, the standard defining a protocol for specific serial transmission. The timing controller selects one standard from among the plurality of standards, performs first determination that is determination on the selected standard to determine whether to receive a lock signal from the source driver within a predetermined period after training pattern data compatible with the selected standard is output to the source driver, and outputs an image signal of the protocol of the selected standard to the source driver when a result of the first determination is positive.

Abstract: A correction data generating device is a device generating correction data for correcting input grayscale level vs. luminance characteristics of a plurality of pixels included in a display region of a display panel, and includes a display controller supplying each of the plurality of pixels with display signal voltages corresponding to two or more grayscale levels; an acquisition portion acquiring two or more luminances of each of the plurality of pixels supplied with the display signal voltages respectively corresponding to the two or more grayscale levels; a specification portion specifying, among the plurality of pixels, at least one abnormal pixel, the input grayscale level vs.

Abstract: A display apparatus is disclosed. The display apparatus according to one Embodiment comprises: a plurality of pixels arranged in a matrix; a plurality of scanning lines; a plurality of data lines; a scanning line drive unit to generate a scanning signal for selecting a group of pixels arranged in the row direction based on a scanning clock signal and successively output the generated scanning signal to the plurality of scanning lines; a data line drive unit to output, to a plurality of data lines, data signals for supplying voltages to the group of pixels arranged in the row direction; and a timing control unit to control the drive timing of the scanning line drive unit and the data line drive unit based on a first clock signal, and to generate the scanning clock signal based on the first clock signal.

Abstract: A display apparatus is disclosed. The display apparatus according to one Embodiment comprises: a plurality of pixels arranged in a matrix; a plurality of scanning lines; a plurality of data lines; a scanning line drive unit to generate a scanning signal for selecting a group of pixels arranged in the row direction based on a scanning clock signal and successively output the generated scanning signal to the plurality of scanning lines; a data line drive unit to output, to a plurality of data lines, data signals for supplying voltages to the group of pixels arranged in the row direction; and a timing control unit to control the drive timing of the scanning line drive unit and the data line drive unit based on a first clock signal, and to generate the scanning clock signal based on the first clock signal.

Abstract: A correction data generating device is a device generating correction data for correcting input grayscale level vs. luminance characteristics of a plurality of pixels included in a display region of a display panel, and includes a display controller supplying each of the plurality of pixels with display signal voltages corresponding to two or more grayscale levels; an acquisition portion acquiring two or more luminances of each of the plurality of pixels supplied with the display signal voltages respectively corresponding to the two or more grayscale levels; a specification portion specifying, among the plurality of pixels, at least one abnormal pixel, the input grayscale level vs.

Abstract: A touch sensor control device which performs appropriate calibration is realized. A touch sensor control device (3) of one aspect of the invention controls a touch sensor (5) and includes a touch position detection unit (14) which specifies a touch position on a detection surface of the touch sensor; a mask generation unit (15) which sets a mask region according to the touch position; and a calibration value generation unit (16) which performs, for a region except the mask region, calibration of detection sensitivity of a touch.

Abstract: A touch sensor control device which performs appropriate calibration is realized. A touch sensor control device (3) of one aspect of the invention controls a touch sensor (5) and includes a touch position detection unit (14) which specifies a touch position on a detection surface of the touch sensor; a mask generation unit (15) which sets a mask region according to the touch position; and a calibration value generation unit (16) which performs, for a region except the mask region, calibration of detection sensitivity of a touch.

Abstract: In one embodiment of the present invention, a driving method of a liquid crystal display device is disclosed.

Abstract: In the liquid crystal display device adjacent source lines may be short-circuited during horizontal scanning periods. A gate driver sequentially may apply a pixel data write pulse to gate lines in each frame period and may apply a black voltage application pulse during the horizontal scanning periods which is after the lapse of a period of the order of a 2/3 frame from the application of the pixel data write pulse to each gate line. A source driver may connect each source line to a charge sharing voltage fixing power supply during the horizontal scanning periods where the adjacent source lines are short-circuited, and thereby brings a charge sharing voltage to the same value regardless of display gradation.

Abstract: An objective of the present invention is to prevent the occurrence of horizontal streaks in a screen of a display device that implements pseudo impulse display by performing black insertion. In a display device that implements pseudo impulse display by performing black insertion, a gate driver applies to each gate bus line a scanning signal including a pixel data write pulse (Pw) for writing pixel data to a pixel formation portion and black voltage application pulses (Pb) for writing a black voltage, based on a gate output control signal (GOE). Here, when the polarity of a polarity control signal (REV) is the same for two consecutive horizontal scanning periods, the gate output control signal (GOE) is maintained at a high level. When the gate output control signal (GOE) is at a high level, the gate driver inhibits a black voltage application pulse (Pb) from being generated in all the scanning signals.

Abstract: In one embodiment of the present application, it is possible to implement impulse display (in a pseudo manner) in a hold type display device while suppressing an increase in complexity of a drive circuit and an increase in operation frequency. In an active matrix type liquid crystal display device of a dot-inversion drive scheme which is configured such that adjacent source lines are short-circuited during a predetermined period every horizontal scanning period, a gate driver sequentially applies a pixel data write pulse to gate lines in each frame period and applies a black voltage application pulse during the above-described predetermined period which is after the lapse of a period of the order of a 2/3 frame from the application of the pixel data write pulse to each gate line.

Abstract: In one embodiment of the present invention, a driving method of a liquid crystal display device is disclosed.

Abstract: A cold-cathode electron source having an improved utilization efficiency of an electron beam and a simple structure. The cold-cathode electron source comprises a gate electrode (4) provided on a substrate (2) through an insulating layer (3) and an emitter (6) extending through the insulating layer (3) and the gate electrode (4) and disposed in an opening of the gate. During the emission of electrons from the emitter (6), the following relationships are satisfied: 10 [V/?m]?(Va?Vg)/(Ha?Hg)?Vg/Hg; and Vg/Hg [V/?m]?Va×10?4×(9.7?1.3×1n(Hg))×(1000/Ha)0.5, where Ha [?m] is an anode-emitter distance, Va [V] is an anode-emitter voltage, Hg [?m] is a gate-emitter distance, and Vg [V] is a gate-emitter voltage.

Abstract: Low-cost electron emission device and field emission display using a cold cathode electron source having a high electron beam utilization efficiency and capable of controlling the spread of the electron beam. Under the condition Ea?Eg, the electric field strength near the gate electrode forming an electron emission control unit is varied between a central portion and a peripheral portion in the plane of a single pixel (or sub-pixel), thereby controlling the spread of the electron beam. A device using a field emission-type electron source array capable of achieving a high emission current density at low voltage can be realized at low cost.

Abstract: Low-cost electron emission device and field emission display using a cold cathode electron source having a high electron beam utilization efficiency and capable of controlling the spread of the electron beam. Under the condition Ea≧Eg, the electric field strength near the gate electrode forming an electron emission control unit is varied between a central portion and a peripheral portion in the plane of a single pixel (or sub-pixel), thereby controlling the spread of the electron beam. A device using a field emission-type electron source array capable of achieving a high emission current density at low voltage can be realized at low cost.

Abstract: A cold-cathode electron source having an improved utilization efficiency of an electron beam and a simple structure. The cold-cathode electron source comprises a gate electrode (4) provided on a substrate (2) through an insulating layer (3) and an emitter (6) extending through the insulating layer (3) and the gate electrode (4) and disposed in an opening of the gate. During the emission of electrons from the emitter (6), the following relationships are satisfied: 10 [V/&mgr;m]≧(Va−Vg)/(Ha−Hg)≧Vg/Hg; and Vg/Hg [V/&mgr;m]≧Va×10−4×(9.7−1.3×1n(Hg))×(1000/Ha)0.5, where Ha [&mgr;m] is an anode-emitter distance, Va [V] is an anode-emitter voltage, Hg [&mgr;m] is a gate-emitter distance, and Vg [V] is a gate-emitter voltage.