Patents by Inventor Junichi Sone

Junichi Sone has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6507509
    Abstract: High device reliability, a reduction in power consumption, and a high operation speed are achieved. When a predetermined bias voltage is applied between a source 1 and a drain 2 to change a gate voltage, a current discretely flows between the source 1 and the drain 2 in accordance with quantized electrostatic energy levels in an island electrode 3. The switching ON/OFF of the current between the source 1 and the drain 2 in this case is enabled by applying ½-electron charge to a gate. When the gate voltage induces polarization in a ferroelectric layer 6, its electric field is applied to the island electrode 3. The current between the source 1 and the drain 2 in this case can be measured with high sensitivity. Charge holding is carried out by the polarization in the ferroelectric layer 6, and stored data can be held even if power supply is cut off.
    Type: Grant
    Filed: August 17, 2001
    Date of Patent: January 14, 2003
    Assignees: Japan Science and Technology Corporation, NEC Corporation
    Inventors: Youichi Ohtsuka, Junichi Sone, Jaw-Shen Tsai, Takanari Yasui, Yasunobu Nakamura
  • Patent number: 4611132
    Abstract: A gate circuit includes a first group of N resistors connected together at one end to form a first input terminal for receiving an input current, a second group of N-1 resistors connected in series and connecting the other ends of the first group of resistors, N Josephson junction circuits each connected in series with one of the first group of resistors, a specific Josephson junction circuit coupled between a second input terminal and one end of the series connection of the second group of resistors, and an additional resistor connected between the second input terminal and a reference potential.
    Type: Grant
    Filed: July 11, 1985
    Date of Patent: September 9, 1986
    Assignee: Nippon Electric Co., Ltd.
    Inventor: Junichi Sone
  • Patent number: 4538077
    Abstract: A circuit utilizing Josephson junctions to perform high speed logic gate switching functions. Three "Y" connected resistors have Josephson junction devices at their non-connected ends. The resistances of the resistors, the critical currents of the Josephson junctions, and the amplitudes of input currents to two of the resistor-Josephson junction connections are selected so that, when the input currents are applied at the same time, the third Josephson junction is switched to the voltage state and both input currents are derived from the third Josephson junction-resistor connection as an input current. In another embodiment, the basic circuit has additional resistor-Josephson junction input arms, producing an M/N logic gate function. In another embodiment, the resistors are ".DELTA." connected. The resulting logic gates have wide operational margins, high speed switching capabilities and small size.
    Type: Grant
    Filed: September 8, 1982
    Date of Patent: August 27, 1985
    Assignee: Nippon Electric Co., Ltd.
    Inventor: Junichi Sone
  • Patent number: 4506166
    Abstract: A pulse generator utilizes a Josephson junction gate circuit having first and second control current paths for conducting control currents in opposite directions. An input signal applied to one of the control current paths will transform the Josephson junction device to the voltage state resulting in the leading edge of a pulse output from a branch circuit connected in parallel with the gate current path of the Josephson junction device, and the same input pulse passed through a delay circuit will be applied in the opposite direction to the other control current path to thereby switch the Josephson junction device back to the zero voltage state and cause the trailing edge of the pulse output. The delay device can be a .pi. circuit, a single additional Josephson junction device having its control current path connected either in series or in parallel with the one control current path of the first Josephson junction device, or a plurality of cascaded Josephson junction devices.
    Type: Grant
    Filed: May 24, 1982
    Date of Patent: March 19, 1985
    Assignee: Nippon Electric Co., Ltd.
    Inventor: Junichi Sone
  • Patent number: 4489424
    Abstract: A frequency divider is provided by coupling the gate current paths of a pair of Josephson junction gate circuits in parallel with the control current path of a third Josephson junction gate circuit being connected in series with the gate current path of one of the first pair of Josephson junctions. The gate current path of the third Josephson junction is connected in series with the control current path of the other of the first pair of Josephson junctions, and an input signal to be frequency divided is connected in common to the connection point of the control current path of the first Josephson junction and gate current path of the third Josephson junction. Current flowing through the control current path of the first Josephson junction will be at one-half the frequency of the input current. A plurality of frequency dividers may be cascaded to perform 1/2.sup.N frequency division.
    Type: Grant
    Filed: May 11, 1982
    Date of Patent: December 18, 1984
    Assignee: Nippon Electric Co., Ltd.
    Inventor: Junichi Sone