Patents by Inventor Junichi Terasima

Junichi Terasima has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Method for simultaneously switching data storage devices to be accessed by a first processing device and a second processing device at a predetermined time period
    Patent number: 5905864
    Abstract: A data reading and image processing system for a video entertainment system with a CD-ROM capability is disclosed with a pair of separate computer systems that are controlled through a controller for accessing data from a memory unit. A first computer system can control the reading of data and the storing of the data in the memory unit in coordination with a first synchronization time period while the second computer system can control the processing of video data signals in an image processing circuit during a second synchronization time period. The data can be appropriately enabled to a position within the memory unit to assist in parallel processing by both computer systems.
    Type: Grant
    Filed: September 22, 1997
    Date of Patent: May 18, 1999
    Assignee: Sega Enterprises, Ltd.
    Inventors: Junichi Terasima, Toshinori Asai, Masaki Kawahori
  • Data reading and image processing system for CD-ROM
    Patent number: 5437464
    Abstract: A data reading and image processing system for a video entertainment system with a CD-ROM capability is disclosed with a pair of separate computer systems that are controlled through a controller for accessing data from a memory unit. A first computer system can control the reading of data and the storing of the data in the memory unit in coordination with a first synchronization time period while the second computer system can control the processing of video data signals in an image processing circuit during a second synchronization time period. The data can be appropriately enabled to a position within the memory unit to assist in parallel processing by both computer systems.
    Type: Grant
    Filed: August 18, 1992
    Date of Patent: August 1, 1995
    Assignee: Kabushiki Kaisha Sega Enterprises
    Inventors: Junichi Terasima, Toshinori Asai, Masaki Kawahori