Patents by Inventor Junichi Uehara

Junichi Uehara has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230378292
    Abstract: A SiC semiconductor device includes a substrate of a first conductivity type, a buffer layer of the first conductivity type on the substrate, a low-concentration layer on the buffer layer, a first deep layer and a JFET portion on the low-concentration layer, a current diffusion layer of the first conductivity type disposed on the JFET portion and having an impurity concentration higher than the low-concentration layer, a second deep layer of a second conductivity type disposed on the first deep layer, a base layer of the second conductivity type disposed on the current diffusion layer and the second deep layer, an impurity region of the first conductivity type disposed in a surface layer portion of the base layer, and a trench gate structure penetrating the impurity region and the base layer and reach the current diffusion layer. The JFET portion is formed with defect portions.
    Type: Application
    Filed: August 7, 2023
    Publication date: November 23, 2023
    Inventors: JUNICHI UEHARA, YUSUKE HAYAMA
  • Publication number: 20230314342
    Abstract: An inspection apparatus includes a light source that generates and emits light to a substrate to be inspected, a lens that captures the light emitted to and reflected by the substrate, a detection unit that detects the light captured by the lens, and a determination unit that calculates a reflectance of light of the substrate based on an intensity of the light generated by the light source and an intensity of the light detected by the detection unit, and performs an abnormality determination of the substrate based on the calculated reflectance.
    Type: Application
    Filed: June 6, 2023
    Publication date: October 5, 2023
    Inventors: JUNICHI UEHARA, KOJI EGUCHI
  • Publication number: 20220181448
    Abstract: A semiconductor device includes a semiconductor substrate having an active region in which a main switching element structure is formed, a current sense region in which a sense switching element structure is formed, and a peripheral region located around the active region and the current sense region. The semiconductor substrate is a 4H-SiC substrate having an off angle in a <11-20>direction. The current sense region is disposed in a range where the active region is not present when viewed along the <1-100>direction.
    Type: Application
    Filed: February 23, 2022
    Publication date: June 9, 2022
    Inventors: JUNICHI UEHARA, TAKEHIRO KATO, TADASHI MISUMI, YUSUKE YAMASHITA
  • Patent number: 9837489
    Abstract: A method of manufacturing a semiconductor device includes forming a second SiC layer of a first conductivity type on a first SiC layer by epitaxial growth, forming a first region of a second conductivity type by selectively ion-implanting first impurities of the second conductivity type into the second SiC layer, removing a portion of the first region, forming a third SiC layer of the first conductivity type on the second SiC layer by epitaxial growth, and forming a second region of the second conductivity type on the first region by selectively ion-implanting second impurities of the second conductivity type into the third SiC layer.
    Type: Grant
    Filed: March 4, 2016
    Date of Patent: December 5, 2017
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Junichi Uehara
  • Publication number: 20170271442
    Abstract: A semiconductor device includes a first electrode, a second electrode, and a silicon carbide layer. The silicon carbide layer includes a first conductivity type first region extending inwardly thereof. The impurity concentration of the first region increases in the depth direction of the silicon carbide layer. The silicon carbide layer includes a second conductivity type second region located adjacent to the first region and containing first and second conductivity type impurities. The concentration of the first conductivity type impurity in the second region increases in the depth direction of the silicon carbide layer. The silicon carbide layer includes a second conductivity type third region. The first region is located between the second region and the third region. The third region contains the first and second conductivity type impurities. The concentration of the first conductivity type impurity in the third region increases in the depth direction of the silicon carbide layer.
    Type: Application
    Filed: August 22, 2016
    Publication date: September 21, 2017
    Inventor: Junichi UEHARA
  • Publication number: 20170077285
    Abstract: A semiconductor device includes a SiC layer having a first surface, a gate insulating film on the first surface, a gate electrode on the gate insulating film, a first SiC region of a first conductivity type in the SiC layer, a second SiC region of a second conductivity type in the first SiC region, a third SiC region of the first conductivity type in the second SiC region, wherein a boundary between the second SiC region and the third SiC region, and the first surface forms a first angle, and a fourth SiC region of the first conductivity type in the third SiC region, having an impurity concentration of the first conductivity type higher than that of the third SiC region, wherein a boundary between the third SiC region and the fourth SiC region, and the first surface forms a second angle that is smaller than the first angle.
    Type: Application
    Filed: March 7, 2016
    Publication date: March 16, 2017
    Inventors: Junichi UEHARA, Masaru FURUKAWA, Hiroshi KONO, Takuma SUZUKI
  • Publication number: 20170076947
    Abstract: A method of manufacturing a semiconductor device includes forming a second SiC layer of a first conductivity type on a first SiC layer by epitaxial growth, forming a first region of a second conductivity type by selectively ion-implanting first impurities of the second conductivity type into the second SiC layer, removing a portion of the first region, forming a third SiC layer of the first conductivity type on the second SiC layer by epitaxial growth, and forming a second region of the second conductivity type on the first region by selectively ion-implanting second impurities of the second conductivity type into the third SiC layer.
    Type: Application
    Filed: March 4, 2016
    Publication date: March 16, 2017
    Inventor: Junichi UEHARA
  • Publication number: 20170077038
    Abstract: A semiconductor device includes a first identification mark that is identifiable by a photoluminescence method, and a second identification mark that is identifiable using visible light.
    Type: Application
    Filed: March 7, 2016
    Publication date: March 16, 2017
    Inventors: Makoto MIZUKAMI, Junichi UEHARA
  • Publication number: 20170077252
    Abstract: A semiconductor device includes a silicon carbide layer having first and second surfaces, a first insulating film on the first surface, a first electrode on the first insulating film, a first silicon carbide region of a first conductivity type in the silicon carbide layer, a second silicon carbide region of a second conductivity type in the first silicon carbide region, a third silicon carbide region of the first conductivity type in the second silicon carbide region, a second electrode on the second surface, which contains metal, silicon, and carbon, and a third electrode in contact with the third silicon carbide region, which contains metal, silicon, and carbon, and has a carbon concentration higher than a carbon concentration of the second electrode.
    Type: Application
    Filed: March 7, 2016
    Publication date: March 16, 2017
    Inventors: Takuma SUZUKI, Junichi UEHARA
  • Patent number: 8089575
    Abstract: A display device includes a sequentially stacked body formed of a gate signal line, an insulation film, a semiconductor layer and a conductor layer on a substrate. The conductive layer forms a drain electrode and a source electrode of a thin film transistor which are arranged with a channel region of the semiconductor layer therebetween, and one of the drain and source electrode is formed in an approximately U shape having an open-ended one end side and a connecting portion on another end side so that the one electrode surrounds a distal end portion of another electrode as viewed in a plan view, and a projecting portion is formed on a side of the connecting portion opposite to the another electrode.
    Type: Grant
    Filed: September 14, 2010
    Date of Patent: January 3, 2012
    Assignees: Hitachi Displays, Ltd., Panasonic Liquid Crystal Display Co., Ltd.
    Inventors: Miyo Ishii, Junichi Uehara, Kunihiko Watanabe
  • Patent number: 8059077
    Abstract: A display device which can ensure the correction of a black spot, for example, in forming an opening portion in a portion of a scanning signal line where the scanning signal line intersects a video signal line and forming a semiconductor layer and a conductor layer by a resist reflow method is provided. A conductor layer includes a video signal line, a drain electrode, a source electrode, and a connecting line. A semiconductor layer is formed so as to cover at least a region of the insulation film which is larger than a region where the video signal line and the connecting line are formed. The connecting line is connected with the video signal line over an opening portion which is formed in the scanning signal line. A cutout portion, a projecting portion or an enlarged-width portion is formed on the video signal line and/or the connecting line in a region which corresponds to the opening portion or in the vicinity of the region.
    Type: Grant
    Filed: April 24, 2009
    Date of Patent: November 15, 2011
    Assignee: Panasonic Liquid Crystal Display Co., Ltd.
    Inventor: Junichi Uehara
  • Patent number: 7939830
    Abstract: An object of the present invention is to provide a display device where a semiconductor layer pattern formed between a pair of electrodes can be formed to a predetermined size, even in the case where the distance between the electrodes on top of a semiconductor layer pattern is relatively large in elements formed in accordance with a photoresist reflow technology.
    Type: Grant
    Filed: June 4, 2009
    Date of Patent: May 10, 2011
    Assignee: Hitachi Displays, Ltd.
    Inventors: Hiroki Takahashi, Shigeru Ohno, Kunihiko Watanabe, Junichi Uehara, Tsuyoshi Uchida, Yasuko Gotoh
  • Publication number: 20100327287
    Abstract: A display device includes a sequentially stacked body formed of a gate signal line, an insulation film, a semiconductor layer and a conductor layer on a substrate. The conductive layer forms a drain electrode and a source electrode of a thin film transistor which are arranged with a channel region of the semiconductor layer therebetween, and one of the drain and source electrode is formed in an approximately U shape having an open-ended one end side and a connecting portion on another end side so that the one electrode surrounds a distal end portion of another electrode as viewed in a plan view, and a projecting portion is formed on a side of the connecting portion opposite to the another electrode.
    Type: Application
    Filed: September 14, 2010
    Publication date: December 30, 2010
    Inventors: Miyo Ishii, Junichi Uehara, Kunihiko Watanabe
  • Patent number: 7829395
    Abstract: The present invention provides a method for manufacturing a display device which can reliably form electrodes in a thin film transistor.
    Type: Grant
    Filed: January 22, 2008
    Date of Patent: November 9, 2010
    Assignees: Hitachi Displays, Ltd., IPS Alpha Technology, Ltd.
    Inventors: Miyo Ishii, Junichi Uehara, Kunihiko Watanabe
  • Patent number: 7825412
    Abstract: The present invention provides a display device which can obviate the occurrence of a leak current in a thin film transistor. In a display device including a substrate, and gate signal lines, an insulation film, semiconductor layers and conductor layers which are sequentially stacked on the substrate, the conductor layer forms at least a drain electrode which is connected to a drain signal line and a source electrode which is connected to a pixel electrode, and the semiconductor layer is formed in a pattern in which the semiconductor layer has a protruding portion which protrudes outwardly from the conductor layer at a portion thereof except for a distal end of the drain electrode as viewed in a plan view.
    Type: Grant
    Filed: December 18, 2007
    Date of Patent: November 2, 2010
    Assignees: Hitachi Displays, Ltd., IPS Alpha Technology, Ltd.
    Inventors: Kunihiko Watanabe, Junichi Uehara, Miyo Ishii
  • Publication number: 20090302320
    Abstract: An object of the present invention is to provide a display device where a semiconductor layer pattern formed between a pair of electrodes can be formed to a predetermined size, even in the case where the distance between the electrodes on top of a semiconductor layer pattern is relatively large in elements formed in accordance with a photoresist reflow technology.
    Type: Application
    Filed: June 4, 2009
    Publication date: December 10, 2009
    Inventors: Hiroki TAKAHASHI, Shigeru Ohno, Kunihiko Watanabe, Junichi Uehara, Tsuyoshi Uchida, Yasuko Gotoh
  • Publication number: 20090295696
    Abstract: A display device which can ensure the correction of a black spot, for example, in forming an opening portion in a portion of a scanning signal line where the scanning signal line intersects a video signal line and forming a semiconductor layer and a conductor layer by a resist reflow method is provided. A conductor layer includes a video signal line, a drain electrode, a source electrode, and a connecting line. A semiconductor layer is formed so as to cover at least a region of the insulation film which is larger than a region where the video signal line and the connecting line are formed. The connecting line is connected with the video signal line over an opening portion which is formed in the scanning signal line. A cutout portion, a projecting portion or an enlarged-width portion is formed on the video signal line and/or the connecting line in a region which corresponds to the opening portion or in the vicinity of the region.
    Type: Application
    Filed: April 24, 2009
    Publication date: December 3, 2009
    Inventor: Junichi Uehara
  • Patent number: 7614338
    Abstract: A piston 1 which is to be movably supported in a cylinder 11 of a pump 10 to be reciprocally driven is formed by a fluororesin so that it is not impaired by a corrosive liquid. A cylindrical outer peripheral portion 2 of the piston 1 has a thickness of 1 mm or less, and is flexible. The outer peripheral portion has a flange portion 7 in an open end portion via an approximately 180-degree folded-back portion 3. The flange portion 7 is attached to the cylinder 11. When the pump 10 is driven, the cylindrical outer peripheral portion 2 of the piston 1 smoothly rolls without producing deflections or bends in a gap between the outer peripheral face of a piston support member 15 and the inner peripheral face of the cylinder 11, while being in close contact with the two faces.
    Type: Grant
    Filed: March 26, 2007
    Date of Patent: November 10, 2009
    Assignees: Toray Engineering Co., Ltd., Nippon Pillar Packing Co., Ltd.
    Inventors: Junichi Uehara, Kazukiyo Teshima
  • Patent number: 7591899
    Abstract: An applicator device comprises a reservoir tank trapping embrocation, a stage holding a substrate, a ferrule having a slit-shaped opening section above the stage, a fluid transfer pump guiding the embrocation within the reservoir tank to the ferrule, a first opening and closing valve between a suction opening of the fluid transfer pump and the reservoir tank, opening when a suction operation is carried out and closing when a discharge operation is carried out, a second opening and closing valve between a discharge opening of the fluid transfer pump and the ferrule, opening when a discharge operation is carried out and closing when a suction operation is carried out, and driving means relatively moving the ferrule and/or substrate when the slit-shaped opening section and the substrate are adjacent to one another, wherein the fluid transfer pump comprises a membranous sealing member sealing a gap between a cylinder and a plunger.
    Type: Grant
    Filed: March 24, 2006
    Date of Patent: September 22, 2009
    Assignee: Toray Engineering Co., Ltd.
    Inventors: Junichi Uehara, Takashi Iwade
  • Publication number: 20080210941
    Abstract: The present invention provides a display device which can obviate the occurrence of a leak current in a thin film transistor. In a display device including a substrate, and gate signal lines, an insulation film, semiconductor layers and conductor layers which are sequentially stacked on the substrate, the conductor layer forms at least a drain electrode which is connected to a drain signal line and a source electrode which is connected to a pixel electrode, and the semiconductor layer is formed in a pattern in which the semiconductor layer has a protruding portion which protrudes outwardly from the conductor layer at a portion thereof except for a distal end of the drain electrode as viewed in a plan view.
    Type: Application
    Filed: December 18, 2007
    Publication date: September 4, 2008
    Inventors: Kunihiko Watanabe, Junichi Uehara, Miyo Ishii