Patents by Inventor Junichi Umezaki

Junichi Umezaki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6821800
    Abstract: In a method of manufacturing a semiconductor light-emitting device involving the steps of: forming a first semiconductor layer; forming a light-emitting layer of superlattice structure by laminating a barrier layer being made of InY1Ga1-Y1N (Y1≧0) and a quantum well layer being made of InY2Ga1-Y2N (Y2>Y1 and Y2>0) on the first semiconductor layer; and forming a second semiconductor layer on the light-emitting layer, an uppermost barrier layer, which will become an uppermost layer of the light-emitting layer, is made thicker than the other barrier layers. Further, at the time of forming the second semiconductor layer, an upper surface of such uppermost barrier layer is caused to disappear so that the thickness of the uppermost barrier layer becomes substantially equal to those of the other barrier layers.
    Type: Grant
    Filed: December 23, 2002
    Date of Patent: November 23, 2004
    Assignee: Toyoda Gosei Co., Ltd.
    Inventors: Norikatsu Koide, Shinya Asami, Junichi Umezaki, Masayoshi Koike, Shiro Yamasaki, Seiji Nagai
  • Publication number: 20030124789
    Abstract: In a method of manufacturing a semiconductor light-emitting device involving the steps of: forming a first semiconductor layer; forming a light-emitting layer of superlattice structure by laminating a barrier layer being made of InY1Ga1−Y1N (Y1≧0) and a quantum well layer being made of InY2Ga1−Y2N (Y2>Y1 and Y2>0) on the first semiconductor layer; and forming a second semiconductor layer on the light-emitting layer, an uppermost barrier layer, which will become an uppermost layer of the light-emitting layer, is made thicker than the other barrier layers. Further, at the time of forming the second semiconductor layer, an upper surface of such uppermost barrier layer is caused to disappear so that the thickness of the uppermost barrier layer becomes substantially equal to those of the other barrier layers.
    Type: Application
    Filed: December 23, 2002
    Publication date: July 3, 2003
    Applicant: Toyoda Gosei Co., Ltd.
    Inventors: Norikatsu Koide, Shinya Asami, Junichi Umezaki, Masayoshi Koike, Shiro Yamasaki, Seiji Nagai
  • Patent number: 6541293
    Abstract: In a method of manufacturing a semiconductor light-emitting device involving the steps of: forming a first semiconductor layer; forming a light-emitting layer of superlattice structure by laminating a barrier layer being made of InY1Ga1−Y1N (Y1≧0) and a quantum well layer being made of InY2Ga1−Y2N (Y2>Y1 and Y2 >0) on the first semiconductor layer; and forming a second semiconductor layer on the light-emitting layer, an uppermost barrier layer, which will become an uppermost layer of the light-emitting layer, is made thicker than the other barrier layers. Further, at the time of forming the second semiconductor layer, an upper surface of such uppermost barrier layer is caused to disappear so that the thickness of the uppermost barrier layer becomes substantially equal to those of the other barrier layers.
    Type: Grant
    Filed: June 3, 2002
    Date of Patent: April 1, 2003
    Assignee: Toyoda Gosei Co., Ltd.
    Inventors: Norikatsu Koide, Shinya Asami, Junichi Umezaki, Masayoshi Koike, Shiro Yamasaki, Seiji Nagai
  • Publication number: 20020146854
    Abstract: In a method of manufacturing a semiconductor light-emitting device involving the steps of: forming a first semiconductor layer; forming a light-emitting layer of superlattice structure by laminating a barrier layer being made of InY1Ga1-Y1N (Y1≧0) and a quantum well layer being made of InY2Ga1-Y2N (Y2>Y1 and Y2>0) on the first semiconductor layer; and forming a second semiconductor layer on the light-emitting layer, an uppermost barrier layer, which will become an uppermost layer of the light-emitting layer, is made thicker than the other barrier layers. Further, at the time of forming the second semiconductor layer, an upper surface of such uppermost barrier layer is caused to disappear so that the thickness of the uppermost barrier layer becomes substantially equal to those of the other barrier layers.
    Type: Application
    Filed: June 3, 2002
    Publication date: October 10, 2002
    Applicant: TOYODA GOSEI CO., LTD.
    Inventors: Norikatsu Koide, Shinya Asami, Junichi Umezaki, Masayoshi Koike, Shiro Yamasaki, Seiji Nagai
  • Patent number: 6420733
    Abstract: In a method of manufacturing a semiconductor light-emitting device involving the steps of: forming a first semiconductor layer; forming a light-emitting layer of superlattice structure by laminating a barrier layer being made of InY1Ga1−Y1N (Y1≧0) and a quantum well layer being made of InY2Ga1−Y2N (Y2>Y1 and Y2>0) on the first semiconductor layer; and forming a second semiconductor layer on the light- emitting layer, an uppermost barrier layer, which will become an uppermost layer of the light-emitting layer, is made thicker than the other barrier layers. Further, at the time of forming the second semiconductor layer, an upper surface of such uppermost barrier layer is caused to disappear so that the thickness of the uppermost barrier layer becomes substantially equal to those of the other barrier layers.
    Type: Grant
    Filed: August 7, 2001
    Date of Patent: July 16, 2002
    Assignee: Toyoda Gosei Co., Ltd.
    Inventors: Norikatsu Koide, Shinya Asami, Junichi Umezaki, Masayoshi Koike, Shiro Yamasaki, Seiji Nagai
  • Publication number: 20010048112
    Abstract: In a method of manufacturing a semiconductor light-emitting device involving the steps of: forming a first semiconductor layer; forming a light-emitting layer of superlattice structure by laminating a barrier layer being made of InY1Ga1-Y1N (Y1≧0) and a quantum well layer being made of InY2Ga1-Y2N (Y2>Y1 and Y2>0) on the first semiconductor layer; and forming a second semiconductor layer on the light-emitting layer, an uppermost barrier layer, which will become an uppermost layer of the light-emitting layer, is made thicker than the other barrier layers. Further, at the time of forming the second semiconductor layer, an upper surface of such uppermost barrier layer is caused to disappear so that the thickness of the uppermost barrier layer becomes substantially equal to those of the other barrier layers.
    Type: Application
    Filed: August 7, 2001
    Publication date: December 6, 2001
    Applicant: TOYODA GOSEI CO., LTD.
    Inventors: Norikatsu Koide, Shinya Asami, Junichi Umezaki, Masayoshi Koike, Shiro Yamasaki, Seiji Nagai
  • Patent number: 6326236
    Abstract: In a method of manufacturing a semiconductor light-emitting device involving the steps of: forming a first semiconductor layer; forming a light-emitting layer of superlattice structure by laminating a barrier layer being made of InY1Ga1−Y1N (Y1≧0) and a quantum well layer being made of InY2Ga1−Y2N (Y2>Y1 and Y2>0) on the first semiconductor layer; and forming a second semiconductor layer on the light-emitting layer, an uppermost barrier layer, which will become an uppermost layer of the light-emitting layer, is made thicker than the other barrier layers. Further, at the time of forming the second semiconductor layer, an upper surface of such uppermost barrier layer is caused to disappear so that the thickness of the uppermost barrier layer becomes substantially equal to those of the other barrier layers.
    Type: Grant
    Filed: February 3, 2000
    Date of Patent: December 4, 2001
    Assignee: Toyoda Gosei Co., Ltd.
    Inventors: Norikatsu Koide, Shinya Asami, Junichi Umezaki, Masayoshi Koike, Shiro Yamasaki, Seiji Nagai
  • Patent number: 6121127
    Abstract: An electrode for a Group III nitride compound semiconductor having p-type conduction that has a double layer structure. The first metal electrode layer comprising, for example, nickel (Ni) and the second metal electrode layer comprising, for example, gold (Au). The Ni layer is formed on the Group III nitride compound semiconductor having p-type conduction, and the Au layer is formed on the Ni layer. Heat treatment changes or reverses the distribution of the elements Ni and Au. Namely, Au is distributed deeper into the Group III nitride compound semiconductor than is Ni. As a result, the resistivity of the electrode is lowered and its ohmic characteristics are improved as well as its adhesive strength.
    Type: Grant
    Filed: November 16, 1999
    Date of Patent: September 19, 2000
    Assignee: Toyoda Gosei Co., Ltd.
    Inventors: Naoki Shibata, Junichi Umezaki, Makoto Asai, Toshiya Uemura, Takahiro Kozawa, Tomohiko Mori, Takeshi Ohwaki
  • Patent number: 6040588
    Abstract: A semiconductor light-emitting device involving the steps of: forming a first semiconductor layer; forming a light-emitting layer of superlattice structure by laminating a barrier layer being made of In.sub.Y1 Ga.sub.1-Y1 N (Y1.gtoreq.0) and a quantum well layer being made of In.sub.Y2 Ga.sub.1-Y1 N (Y2>Y1 and Y2>0) on the first semiconductor layer; and forming a second semiconductor layer on the light-emitting layer, an uppermost barrier layer, which will become an uppermost layer of the light-emitting layer, is made thicker than the other barrier layers. Further, at the time of forming the second semiconductor layer, an upper surface of such uppermost barrier layer is caused to disappear so that the thickness of the uppermost barrier layer becomes substantially equal to those of the other barrier layers.
    Type: Grant
    Filed: September 8, 1997
    Date of Patent: March 21, 2000
    Assignee: Toyoda Gosei Co., Ltd.
    Inventors: Norikatsu Koide, Shinya Asami, Junichi Umezaki, Masayoshi Koike, Shiro Yamasaki, Seiji Nagai
  • Patent number: 6008539
    Abstract: An electrode for a Group III nitride compound semiconductor having p-type conduction that has a double layer structure. The first metal electrode layer comprising, for example, nickel (Ni) and the second metal electrode layer comprising, for example, gold (Au). The Ni layer is formed on the Group III nitride compound semiconductor having p-type conduction, and the Au layer is formed on the Ni layer. Heat treatment changes or reverses the distribution of the elements Ni and Au. Namely, Au is distributed deeper into the Group III nitride compound semiconductor than is Ni. As a result, the resistivity of the electrode is lowered and its ohmic characteristics are improved as well as its adhesive strength.
    Type: Grant
    Filed: June 14, 1996
    Date of Patent: December 28, 1999
    Assignee: Toyoda Gosei Co., Ltd.
    Inventors: Naoki Shibata, Junichi Umezaki, Makoto Asai, Toshiya Uemura, Takahiro Kozawa, Tomohiko Mori, Takeshi Ohwaki
  • Patent number: 5862167
    Abstract: A light-emitting diode or laser diode is provided which uses a Group III nitride compound semiconductor satisfying the formula (Al.sub.x Ga.sub.1-x).sub.y In.sub.1-y N, inclusive of 0.ltoreq.x.ltoreq.1, and 0.ltoreq.y.ltoreq.1. A double hetero-junction structure is provided which sandwiches an active layer between layers having wider band gaps than the active layer. The diode has a multi-layer structure which has either a reflecting layer to reflect emission light or a reflection inhibiting layer. The emission light of the diode exits the diode in a direction perpendicular to the double hetero-junction structure. Light emitted in a direction opposite to the light outlet is reflected by the reflecting film toward the direction of the light outlet. Further, the reflection inhibiting film, disposed at or near the light outlet, helps the release of exiting light by minimizing or preventing reflection. As a result, light can be efficiently emitted by the light-generating diode.
    Type: Grant
    Filed: May 27, 1997
    Date of Patent: January 19, 1999
    Assignees: Toyoda Gosei Co., Ltd., Research Development Corporation of Japan, Isamu Akasaki, Hiroshi Amano
    Inventors: Michinari Sassa, Norikatsu Koide, Shiro Yamazaki, Junichi Umezaki, Naoki Shibata, Masayoshi Koike, Isamu Akasaki, Hiroshi Amano
  • Patent number: 5753939
    Abstract: A light-emitting semiconductor device having an improved metal electrode and semiconductor structure that lowers the driving voltage of the device. The device has a hetero p-n junction structure. This structure includes: (1) an n-layer having n-type conduction and a Group III nitride compound semiconductor satisfying the formula Al.sub.x Ga.sub.y In.sub.1-x-y N, inclusive of x=0, y=0, and x=y=0; (2) a p-layer having p-type conduction and a Group III nitride compound semiconductor satisfying the formula Al.sub.x Ga.sub.y In.sub.1-x-y N, inclusive of x=0, y=0, and x=y=0; and (3) an emission layer disposed between the n-layer and the p-layer. The device also has a metal electrode and a contact layer that is disposed between the p-layer and the metal electrode. The contact layer is doped with an acceptor impurity more heavily that is the p-layer. The acceptor impurity may be magnesium (Mg). The contact layer may be doped within the range of 1.times.10.sup.20 /cm.sup.3 to 1.times.10.sup.2l /cm.sup.
    Type: Grant
    Filed: March 7, 1997
    Date of Patent: May 19, 1998
    Inventors: Michinari Sassa, Naoki Shibata, Shinya Asami, Masayoshi Koike, Junichi Umezaki, Takahiro Kozawa
  • Patent number: 5587593
    Abstract: A light-emitting semiconductor device includes a sapphire substrate whose main surface orientation is tilted by 1 to 4 degrees from its axis "a" <1120>, and layers epitaxially formed thereon. Tilting the surface orientation of the sapphire substrate enables uniform doping of a p-type impurity into the layers epitaxially grown thereon. As a result, the luminous intensity of the light-emitting semiconductor device is improved.
    Type: Grant
    Filed: April 19, 1995
    Date of Patent: December 24, 1996
    Assignees: Toyoda Gosei Co., Ltd., Research Development Corporation of Japan
    Inventors: Norikatsu Koide, Shiro Yamazaki, Junichi Umezaki, Shinya Asami