Abstract: In order to provide a variable gain amplifier of enhanced linearity and wide variable gain range, an AM-modulated signal reception circuit in which the noise of an input portion is reduced so as to improve the follow-up characteristic of an AGC circuit, and an AM-modulated signal detection circuit which produces an output precisely corresponding to a peak value envelope, the variable gain amplifier comprises a differential input amplifier which includes transistors T1 and T2 (in FIG. 8) constituting a differential pair, and a constant current circuit Is operating as an absorption current circuit of the transistors T1 and T2, and a variable impedance which is connected between the sources of the respective transistors T1 and T2, wherein the gain of the differential input amplifier is made variable by variably controlling the value of the variable impedance.

Abstract: A differential current driver has a current source that supplies current selectively to two output terminals according to data to be transmitted. A comparison circuit compares the current output by the current source with a reference value and generates a control signal. Responding to the control signal, a current adjustment circuit adjusts the current supplied to the two output terminals by, for example, shunting part of the current to ground, or by adjusting a bias voltage that controls the current output of the current source. A switching circuit may shunt all of the current output by the current source during a brief period preceding output of current from the output terminals. These operations take place around transitions from the output disabled state to the output enabled state, and avoid the output of excessive current just after such transitions.

Abstract: A differential current driver has a current source that supplies current selectively to two output terminals according to data to be transmitted. A comparison circuit compares the current output by the current source with a reference value and generates a control signal. Responding to the control signal, a current adjustment circuit adjusts the current supplied to the two output terminals by, for example, shunting part of the current to ground, or by adjusting a bias voltage that controls the current output of the current source. A switching circuit may shunt all of the current output by the current source during a brief period preceding output of current from the output terminals. These operations take place around transitions from the output disabled state to the output enabled state, and avoid the output of excessive current just after such transitions.

Abstract: A differential current driver has a current source that supplies current selectively to two output terminals according to data to be transmitted. A comparison circuit compares the current output by the current source with a reference value and generates a control signal. Responding to the control signal, a current adjustment circuit adjusts the current supplied to the two output terminals by, for example, shunting part of the current to ground, or by adjusting a bias voltage that controls the current output of the current source. A switching circuit may shunt all of the current output by the current source during a brief period preceding output of current from the output terminals. These operations take place around transitions from the output disabled state to the output enabled state, and avoid the output of excessive current just after such transitions.

Abstract: A data transfer rate deciding method and circuit that can decide, upon reception of a data packet, whether a data transfer rate decided by a reception side is the same as that of data transferred by a transmission side. The method includes identifying a data transfer rate by a procedure performed before data transfer; regenerating a reception clock pulse based on a received signal upon data reception; comparing the reception clock pulse to a reference frequency clock pulse given on the basis of the data transfer rate identified by the procedure; and notifying as an error if the data transfer rate identified by the procedure is different from that of the received data.

Abstract: In order to provide a variable gain amplifier of enhanced linearity and wide variable gain range, an AM-modulated signal reception circuit in which the noise of an input portion is reduced so as to improve the follow-up characteristic of an AGC circuit, and an AM-modulated signal detection circuit which produces an output precisely corresponding to a peak value envelope, the variable gain amplifier comprises a differential input amplifier which includes transistors T1 and T2 (in FIG. 8) constituting a differential pair, and a constant current circuit Is operating as an absorption current circuit of the transistors T1 and T2, and a variable impedance which is connected between the sources of the respective transistors T1 and T2, wherein the gain of the differential input amplifier is made variable by variably controlling the value of the variable impedance.

Abstract: There is disclosed an interface circuit capable of correcting the resistance value of a terminator according to a change in an ambient temperature or the like without causing any distortion in an output waveform during data transmitting, and any reception errors during data receiving. In this case, the interface circuit comprises: a data input/output terminal; a data driver; a data receiver; terminators corrected for resistance values; a detection circuit; and a correction circuit. The detection circuit detects the stoppage of data transmitting/receiving by detecting the predetermined states of potentials respectively of a D+ terminal and a D? terminal. The correction circuit outputs a control signal CTRL to each of the terminators when the result of the detection by the detection circuit shows the stoppage of the data transmitting/receiving. The resistance value of each of the terminators is corrected in response to the control signal CTRL outputted from the correction circuit.

Abstract: In order to provide a variable gain amplifier of enhanced linearity and wide variable gain range, an AM-modulated signal reception circuit in which the noise of an input portion is reduced so as to improve the follow-up characteristic of an AGC circuit, and an AM-modulated signal detection circuit which produces an output precisely corresponding to a peak value envelope, the variable gain amplifier comprises a differential input amplifier which includes transistors T1 and T2 (in FIG. 8) constituting a differential pair, and a constant current circuit Is operating as an absorption current circuit of the transistors T1 and T2, and a variable impedance which is connected between the sources of the respective transistors T1 and T2, wherein the gain of the differential input amplifier is made variable by variably controlling the value of the variable impedance.

Abstract: A differential current driver has a current source that supplies current selectively to two output terminals according to data to be transmitted. A comparison circuit compares the current output by the current source with a reference value and generates a control signal. Responding to the control signal, a current adjustment circuit adjusts the current supplied to the two output terminals by, for example, shunting part of the current to ground, or by adjusting a bias voltage that controls the current output of the current source. A switching circuit may shunt all of the current output by the current source during a brief period preceding output of current from the output terminals. These operations take place around transitions from the output disabled state to the output enabled state, and avoid the output of excessive current just after such transitions.

Abstract: There is disclosed an interface circuit capable of correcting the resistance value of a terminator according to a change in an ambient temperature or the like without causing any distortion in an output waveform during data transmitting, and any reception errors during data receiving. In this case, the interface circuit comprises: a data input/output terminal; a data driver; a data receiver; terminators corrected for resistance values; a detection circuit; and a correction circuit. The detection circuit detects the stoppage of data transmitting/receiving by detecting the predetermined states of potentials respectively of a D+ terminal and a D− terminal. The correction circuit outputs a control signal CTRL to each of the terminators when the result of the detection by the detection circuit shows the stoppage of the data transmitting/receiving. The resistance value of each of the terminators is corrected in response to the control signal CTRL outputted from the correction circuit.

Abstract: The invention provides a data transfer rate deciding method and circuit that can decide, upon reception of a data packet, whether a data transfer rate decided by a reception side is the same as that of data transferred by a transmission side. Specifically, the method comprises the steps of: identifying a data transfer rate by a procedure performed before data transfer; regenerating a reception clock pulse based on a received signal upon data reception; comparing the reception clock pulse to a reference frequency clock pulse given on the basis of the data transfer rate identified by the procedure; and notifying as an error if the data transfer rate identified by the procedure is different from that of the received data.

Abstract: A color palette RAM 100 according to the present invention, which is provided with a RAM 101 for storing color information, an address register 102 that holds an input address and outputs an address to the RAM 101 and a comparator circuit 103 that compares the input address and the address output by the address register, outputs a match signal if these addresses match and stops the operation of the RAM 101 based upon the match signal, is capable of minimizing the level of the power consumed for precharge operations and the like, since the RAM can be set in a disabled state when the same address in the color palette RAM is accessed continuously, as is the case, for instance, when pixels of the same color lie adjacent to one another.

Abstract: A color palette RAM 100 according to the present invention, which is provided with a RAM 101 for storing color information, an address register 102 that holds an input address and outputs an address to the RAM 101 and a comparator circuit 103 that compares the input address and the address output by the address register, outputs a match signal if these addresses match and stops the operation of the RAM 101 based upon the match signal, is capable of minimizing the level of the power consumed for precharge operations and the like, since the RAM can be set in a disabled state when the same address in the color palette RAM is accessed continuously, as is the case, for instance, when pixels of the same color lie adjacent to one another.

Abstract: An integrated circuit card control circuit includes a clock control circuit for receiving a control signal, delaying the received control signal by a first delay time, and outputting the delayed control signal as a clock control signal. A delayed signal generating circuit receives the control signal, delays the control signal by a second delay time which is longer than the first delay time, and outputs the delayed control signal as a delayed signal. A power supply control circuit outputs a power supply control signal in response to one of either the control signal or the delayed signal, and a reset control circuit outputs a reset control signal in response to both the control signal and the delayed signal.