Abstract: A low cost camera by implementing the major functions in host software is provided. This is accomplished by sending raw, digitized data from the camera directly to the host. The increased volume of raw data is handled by either an improved compression/decompression scheme using lossless compression, using lossy compression or using a shared bus with higher bandwidth. By moving such functions as color processing and scaling to the host, the pixel correction can also be moved to the host. This in turn allows the elimination of the frame buffer memory from the camera. Finally, the camera can use a low cost lens by implementing vignetting, distortion, gamma or aliasing correction with a correction value stored in a register of the camera for later access by the host to perform corrections.

Abstract: A low cost camera by implementing the major functions in host software is provided. This is accomplished by sending raw, digitized data from the camera directly to the host. The increased volume of raw data is handled by either an improved compression/decompression scheme using lossless compression, using lossy compression or using a shared bus with higher bandwidth. By moving such functions as color processing and scaling to the host, the pixel correction can also be moved to the host. This in turn allows the elimination of the frame buffer memory from the camera. Finally, the camera can use a low cost lens by implementing vignetting, distortion, gamma or aliasing correction with a correction value stored in a register of the camera for later access by the host to perform corrections.

Abstract: A processing device performs operations in response to program instructions. In particular, values are written to a data memory of the system, which alters a defined visible state of the system. In the event of an exception (e.g. a pagefault or TLB miss in a virtual memory system), control returns to a recent checkpoint instruction after handling the exception, and instructions are re-executed. A record/replay circuit is provided in the form of an event memory, which remembers only those values read from the data memory since the last checkpoint. During the re-execution, the recorded values are reproduced instead of performing actual memory reads, and all memory accesses are suppressed. When the re-execution reaches the point where execution was originally interrupted, recording begins again to prepare for any further exception which may arise before the next checkpoint.

Abstract: A processing device includes an imitation multiport memory circuit (10) interconnecting inputs and outputs of a group of functional units (F1, . . . FN), all operating under control of a single series of very long program instructions. The memory circuit (10) comprises a plurality of separate memory units (15), each having a read port (12) connected to a respective functional unit input, and a crossbar switching circuit (18) connected between the functional unit outputs and write ports of the separate memory units. The memory circuit (10) provides substantially the same performance as a true multiport memory but requires a smaller circuit area, allowing a larger processing device to be integrated in one chip than previously. Collisions for access to a memory unit write port can be resolved without rescheduling by use of a delay element (21,70) and/or an additional write port (82) to a memory unit.