Patents by Inventor Junji Ishiyama

Junji Ishiyama has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10951115
    Abstract: A switching regulator includes a switch device that is connected between an input terminal to which an input DC voltage is applied and an output terminal from which an output DC voltage is output, and that is turned on and off according to a drive signal; a hysteresis generation circuit to which the input DC voltage and the output DC voltage are applied; a reference voltage generation circuit that generates a reference voltage having a gradient proportional to an output current or an output voltage; and a drive signal generation circuit that generates the drive signal by comparing the output DC voltage with the reference voltage, and that, where the hysteresis generation circuit generates the output current or the output voltage that is inversely proportional to a differential voltage between the input DC voltage and the output DC voltage.
    Type: Grant
    Filed: January 23, 2019
    Date of Patent: March 16, 2021
    Assignee: PANASONIC SEMICONDUCTOR SOLUTIONS CO., LTD.
    Inventors: Tetsuya Mihashi, Junji Ishiyama
  • Publication number: 20190157973
    Abstract: A switching regulator includes a switch device that is connected between an input terminal to which an input DC voltage is applied and an output terminal from which an output DC voltage is output, and that is turned on and off according to a drive signal; a hysteresis generation circuit to which the input DC voltage and the output DC voltage are applied; a reference voltage generation circuit that generates a reference voltage having a gradient proportional to an output current or an output voltage; and a drive signal generation circuit that generates the drive signal by comparing the output DC voltage with the reference voltage, and that, where the hysteresis generation circuit generates the output current or the output voltage that is inversely proportional to a differential voltage between the input DC voltage and the output DC voltage.
    Type: Application
    Filed: January 23, 2019
    Publication date: May 23, 2019
    Inventors: Tetsuya MIHASHI, Junji ISHIYAMA
  • Patent number: 7772822
    Abstract: A power supply apparatus having a soft start function that enables a startup without any overshoot within an appropriate startup time regardless of whether the load is heavy or light. Even when output direct current voltage Vo has not yet risen upon startup, switch circuit (4) is turned ON within a count time of timer (7), and clamping circuit (5) clamps error signal (Ve) of error amplifier (2), so that an excessive signal is prevented from entering PWM circuit (6), and electric power supplied to load (13) is controlled. Consequently, supply power as the power supply apparatus is limited, and any inrush current can be prevented from being generated. By controlling the count time of timer (7) when this error signal is clamped, it is possible to realize a startup within an appropriate startup time without any overshoot.
    Type: Grant
    Filed: March 4, 2008
    Date of Patent: August 10, 2010
    Assignee: Panasonic Corporation
    Inventors: Yoshihito Kawakami, Junji Ishiyama
  • Publication number: 20080218134
    Abstract: A power supply apparatus having a soft start function that enables a startup without any overshoot within an appropriate startup time regardless of whether the load is heavy or light. Even when output direct current voltage Vo has not yet risen upon startup, switch circuit 4 is turned ON within a count time of timer 7, and clamping circuit 5 clamps error signal Ve of error amplifier 2, so that an excessive signal is prevented from entering PWM circuit 6, and electric power supplied to load 13 is controlled. Consequently, supply power as the power supply apparatus is limited, and any inrush current can be prevented from being generated. By controlling the count time of timer 7 when this error signal is clamped, it is possible to realize a startup within an appropriate startup time without any overshoot.
    Type: Application
    Filed: March 4, 2008
    Publication date: September 11, 2008
    Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
    Inventors: Yoshihito KAWAKAMI, Junji ISHIYAMA