Patents by Inventor Junji Naruse

Junji Naruse has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230363188
    Abstract: To provide a solid-state imaging device capable of achieving a further improvement in polarization efficiency.
    Type: Application
    Filed: June 16, 2021
    Publication date: November 9, 2023
    Inventor: JUNJI NARUSE
  • Publication number: 20220344388
    Abstract: There is provided a light-receiving element including: an on-chip lens; an interconnection layer; and a semiconductor layer arranged between the on-chip lens and the interconnection layer, the semiconductor layer including a photodiode, an interpixel trench portion engraved up to at least a part in a depth direction of the semiconductor layer at a boundary portion of an adjacent pixel, and an in-pixel trench portion engraved at a prescribed depth from a front surface or a rear surface of the semiconductor layer at a position overlapping a part of the photodiode in a plan view.
    Type: Application
    Filed: September 11, 2020
    Publication date: October 27, 2022
    Applicant: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventors: Yoshiki EBIKO, Sozo YOKOGAWA, Junji NARUSE
  • Publication number: 20150035101
    Abstract: According to one embodiment, a solid-state imaging device is provided. The solid-state imaging device includes a photoelectric conversion element, a first anti-reflection film, an intermediate film, and a second anti-reflection film. The photoelectric conversion element is disposed corresponding to each of a plurality of colored lights. The first anti-reflection film is disposed on a photo-receiving surface side of the photoelectric conversion element. The intermediate film is disposed on a photo-receiving surface side of the first anti-reflection film. The second anti-reflection film is disposed on a photo-receiving surface side of the intermediate film. At least one of the first anti-reflection film, the intermediate film, and the second anti-reflection film has different film thicknesses for respective colored lights to be received.
    Type: Application
    Filed: February 6, 2014
    Publication date: February 5, 2015
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Junji Naruse, Nagataka Tanaka
  • Patent number: 8508640
    Abstract: According to one embodiment, a back side illumination type solid-state imaging device includes an imaging area in which a plurality of unit pixels each including a photoelectric conversion section and a signal scan circuit section are arranged on a semiconductor substrate, and a light illumination surface formed on a surface of the semiconductor substrate located opposite a surface of the semiconductor substrate on which the signal scan circuit section is formed, wherein the unit pixel comprises a high-sensitivity pixel and a low-sensitivity pixel with a lower sensitivity than the high-sensitivity pixel. And each of the high-sensitivity pixel and the low-sensitivity element comprises a first pixel separation layer located on the light illumination surface side in the semiconductor substrate to separate the pixels from each other.
    Type: Grant
    Filed: December 16, 2010
    Date of Patent: August 13, 2013
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Junji Naruse, Nagataka Tanaka
  • Patent number: 8319873
    Abstract: A solid-state imaging device includes a photodiode array having a plurality of photodiodes, read transistors each having one terminal and the other terminal of a current path, one terminal of the current path being connected to one of four photodiodes corresponding to two photodiodes adjacent in a row direction and two photodiodes adjacent in a column direction, the other terminal of the current path being connected in common to a first node, the first node provided as a set of four photodiodes being in a floating-state, read control lines to connect the gate of the read transistor corresponding to each set of the read transistors in common, and independently supplied with a read signal, and vertical signal lines supplied with a signal converted by two photodiodes adjacent in a row direction of the photodiodes for an independent period within one horizontal blanking period of image scanning.
    Type: Grant
    Filed: July 16, 2009
    Date of Patent: November 27, 2012
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hirofumi Yamashita, Junji Naruse
  • Publication number: 20110228149
    Abstract: According to one embodiment, a solid-state imaging device includes a photodiode module in which first photodiodes corresponding to high-sensitivity pixels and second photodiodes corresponding to low-sensitivity pixels are alternately arranged at preset pitch P in a semiconductor substrate, high-sensitivity pixel interconnection lines formed at preset pitch C on the substrate, low-sensitivity pixel interconnection lines that are formed at preset pitch D on the substrate, high-sensitivity pixel color filters formed at preset pitch A on the opposite side of the respective interconnection lines with respect to the substrate, and low-sensitivity pixel interconnection lines that are formed at preset pitch B on the other side of the interconnection lines with respect to the substrate. The relationship between the above pitches is set to D=B<P<A=C.
    Type: Application
    Filed: March 18, 2011
    Publication date: September 22, 2011
    Inventors: Junji NARUSE, Nagataka Tanaka
  • Publication number: 20110141333
    Abstract: According to one embodiment, a back side illumination type solid-state imaging device includes an imaging area in which a plurality of unit pixels each including a photoelectric conversion section and a signal scan circuit section are arranged on a semiconductor substrate, and a light illumination surface formed on a surface of the semiconductor substrate located opposite a surface of the semiconductor substrate on which the signal scan circuit section is formed, wherein the unit pixel comprises a high-sensitivity pixel and a low-sensitivity pixel with a lower sensitivity than the high-sensitivity pixel. And each of the high-sensitivity pixel and the low-sensitivity element comprises a first pixel separation layer located on the light illumination surface side in the semiconductor substrate to separate the pixels from each other.
    Type: Application
    Filed: December 16, 2010
    Publication date: June 16, 2011
    Inventors: Junji Naruse, Nagataka Tanaka
  • Patent number: 7719591
    Abstract: A solid-state imaging device that suppresses crosstalk of light in a semiconductor substrate that caused by diffraction of light is disclosed. According to one aspect of the present invention, there is provided a solid-state imaging device comprising a plurality of pixels, each pixel comprising a photoelectric conversion element that is provided in a semiconductor substrate and performs photoelectric conversion of incident light to store signal charges, a floating junction that is provided in the semiconductor substrate in the proximity of the photoelectric conversion element and temporarily stores signal charges, and a transfer transistor that transfers the signal charges stored in the photoelectric conversion element to the floating junction, wherein at least one transfer transistor includes a gate electrode extended to cover a corresponding photoelectric conversion element.
    Type: Grant
    Filed: April 17, 2007
    Date of Patent: May 18, 2010
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Junji Naruse, Nagataka Tanaka
  • Publication number: 20100012993
    Abstract: A solid-state imaging device includes a photodiode array having a plurality of photodiodes, read transistors each having one terminal and the other terminal of a current path, one terminal of the current path being connected to each of four photodiodes corresponding to two photodiodes adjacent in a row direction and two photodiodes adjacent in a column direction, the other terminal of the current path being connected in common to a first node, the first node provided as a set of four photodiodes being in a floating-state, read control lines to connect the gate of the read transistor corresponding to each set of the read transistors in common, and independently supplied with a read signal, and vertical signal lines supplied with a signal converted by two photodiodes adjacent in a row direction of the photodiodes for an independent period within one horizontal blanking period of image scanning.
    Type: Application
    Filed: July 16, 2009
    Publication date: January 21, 2010
    Inventors: Hirofumi YAMASHITA, Junji Naruse
  • Publication number: 20070247537
    Abstract: A solid-state imaging device that suppresses crosstalk of light in a semiconductor substrate that caused by diffraction of light is disclosed. According to one aspect of the present invention, there is provided a solid-state imaging device comprising a plurality of pixels, each pixel comprising a photoelectric conversion element that is provided in a semiconductor substrate and performs photoelectric conversion of incident light to store signal charges, a floating junction that is provided in the semiconductor substrate in the proximity of the photoelectric conversion element and temporarily stores signal charges, and a transfer transistor that transfers the signal charges stored in the photoelectric conversion element to the floating junction, wherein at least one transfer transistor includes a gate electrode extended to cover a corresponding photoelectric conversion element.
    Type: Application
    Filed: April 17, 2007
    Publication date: October 25, 2007
    Inventors: Junji Naruse, Nagataka Tanaka