Patents by Inventor Junji Senzaki

Junji Senzaki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9978842
    Abstract: According to one embodiment, a semiconductor device includes a first semiconductor region, a second semiconductor region, a third semiconductor region, a first electrode, a second electrode, a control electrode and an insulating film. The first semiconductor region is of a first conductivity type and includes SiC. The second semiconductor region is provided on the first semiconductor region and has a first surface. The second semiconductor region is of a second conductivity type and includes SiC. The third semiconductor region is provided on the second semiconductor region, is of the first conductivity type and includes SiC. The first and second electrodes are electrically connected to the third semiconductor region. The control electrode is provided on the second semiconductor region. The insulating film is provided between the second semiconductor region and the control electrode. The insulating film contacts the first surface and the control electrode and includes nitrogen.
    Type: Grant
    Filed: March 16, 2016
    Date of Patent: May 22, 2018
    Assignees: Kabushiki Kaisha Toshiba, National Institute of Advanced Industrial Science and Technology, FUJI ELECTRIC CO., LTD.
    Inventors: Keiko Ariyoshi, Tatsuo Shimizu, Takashi Shinohe, Junji Senzaki, Shinsuke Harada, Takahito Kojima
  • Publication number: 20160197150
    Abstract: According to one embodiment, a semiconductor device includes a first semiconductor region, a second semiconductor region, a third semiconductor region, a first electrode, a second electrode, a control electrode and an insulating film. The first semiconductor region is of a first conductivity type and includes SiC. The second semiconductor region is provided on the first semiconductor region and has a first surface. The second semiconductor region is of a second conductivity type and includes SiC. The third semiconductor region is provided on the second semiconductor region, is of the first conductivity type and includes SiC. The first and second electrodes are electrically connected to the third semiconductor region. The control electrode is provided on the second semiconductor region. The insulating film is provided between the second semiconductor region and the control electrode. The insulating film contacts the first surface and the control electrode and includes nitrogen.
    Type: Application
    Filed: March 16, 2016
    Publication date: July 7, 2016
    Inventors: Keiko ARIYOSHI, Tatsuo SHIMIZU, Takashi SHINOHE, Junji SENZAKI, Shinsuke HARADA, Takahito KOJIMA
  • Patent number: 7880173
    Abstract: A semiconductor device and a method of manufacturing the device using a (000-1)-faced silicon carbide substrate are provided. A SiC semiconductor device having a high blocking voltage and high channel mobility is manufactured by optimizing the heat-treatment method used following the gate oxidation. The method of manufacturing a semiconductor device includes the steps of forming a gate insulation layer on a semiconductor region formed of silicon carbide having a (000-1) face orientation, forming a gate electrode on the gate insulation layer, forming an electrode on the semiconductor region, cleaning the semiconductor region surface. The gate insulation layer is formed in an atmosphere containing 1% or more H2O (water) vapor at a temperature of from 800° C. to 1150° C. to reduce the interface trap density of the interface between the gate insulation layer and the semiconductor region.
    Type: Grant
    Filed: February 4, 2008
    Date of Patent: February 1, 2011
    Assignee: National Institute of Advanced Industrial Science and Technology
    Inventors: Kenji Fukuda, Junji Senzaki, Shinsuke Harada, Makoto Kato, Tsutomu Yatsuo, Mitsuo Okamoto
  • Patent number: 7538352
    Abstract: In a semiconductor device that uses a silicon carbide semiconductor substrate having p type, n type impurity semiconductor regions formed by ion implantation, the electrical characteristics of the end semiconductor device can be improved by decreasing the roughness of the silicon carbide semiconductor substrate surface. The semiconductor device of this invention is a Schottky barrier diode or a p-n type diode comprising at least one of a p type semiconductor region and n type semiconductor region selectively formed in a silicon carbide semiconductor region having an outermost surface layer surface that is a (000-1) surface or a surface inclined at an angle to the (000-1) surface, and a metal electrode formed on the outermost surface layer surface, that controls a direction in which electric current flows in a direction perpendicular to the outermost surface layer surface from application of a voltage to the metal electrode.
    Type: Grant
    Filed: November 25, 2003
    Date of Patent: May 26, 2009
    Assignee: National Institute of Advanced Industrial Science and Technology
    Inventors: Kenji Fukuda, Ryoji Kosugi, Junji Senzaki, Shinsuke Harada
  • Publication number: 20090057686
    Abstract: In a semiconductor device that uses a silicon carbide semiconductor substrate having p type, n type impurity semiconductor regions formed by ion implantation, the electrical characteristics of the end semiconductor device can be improved by decreasing the roughness of the silicon carbide semiconductor substrate surface. The semiconductor device of this invention is a Schottky barrier diode or a p-n type diode comprising at least one of a p type semiconductor region and n type semiconductor region selectively formed in a silicon carbide semiconductor region having an outermost surface layer surface that is a (000-1) surface or a surface inclined at an angle to the (000-1) surface, and a metal electrode formed on the outermost surface layer surface, that controls a direction in which electric current flows in a direction perpendicular to the outermost surface layer surface from application of a voltage to the metal electrode.
    Type: Application
    Filed: October 30, 2008
    Publication date: March 5, 2009
    Applicant: National Institute of Adv. Industrial Sci. & Tech.
    Inventors: Kenji FUKUDA, Ryoji Kosugi, Junji Senzaki, Shinsuke Harada
  • Publication number: 20080203400
    Abstract: A semiconductor device and a method of manufacturing the device using a (000-1)-faced silicon carbide substrate are provided. A SiC semiconductor device having a high blocking voltage and high channel mobility is manufactured by optimizing the heat-treatment method used following the gate oxidation. The method of manufacturing a semiconductor device includes the steps of forming a gate insulation layer on a semiconductor region formed of silicon carbide having a (000-1) face orientation, forming a gate electrode on the gate insulation layer, forming an electrode on the semiconductor region, cleaning the semiconductor region surface. The gate insulation layer is formed in an atmosphere containing 1% or more H2O (water) vapor at a temperature of from 800° C. to 1150° C. to reduce the interface trap density of the interface between the gate insulation layer and the semiconductor region.
    Type: Application
    Filed: February 4, 2008
    Publication date: August 28, 2008
    Applicant: National Institute of Advanced Indust. Sci & Tech
    Inventors: Kenji Fukuda, Junji Senzaki, Shinsuke Harada, Makoto Kato, Tsutomu Yatsuo, Mitsuo Okamoto
  • Patent number: 7338869
    Abstract: A semiconductor device and a method of manufacturing the device using a (000-1)-faced silicon carbide substrate are provided. A SiC semiconductor device having a high voltage resistancehigh blocking voltage and high channel mobility is manufactured by optimizing the heat-treatment method used following the gate oxidation. The method of manufacturing a semiconductor device includes the steps of forming a gate insulation layer on a semiconductor region formed of silicon carbide having a (000-1) face orientation, forming a gate electrode on the gate insulation layer, forming an electrode on the semiconductor region, cleaning the semiconductor region surface. The gate insulation layer is formed in an atmosphere containing 1% or more H2O (water) vapor at a temperature of from 800° C. to 1150° C. to reduce the interface trap density of the interface between the gate insulation layer and the semiconductor region.
    Type: Grant
    Filed: June 26, 2003
    Date of Patent: March 4, 2008
    Assignee: National Institute of Advanced Industrial Science and Technology
    Inventors: Kenji Fukuda, Junji Senzaki
  • Patent number: 7265388
    Abstract: A semiconductor device formed on a silicon carbide semiconductor substrate comprises an epitaxial layer formed on a surface sloping (or inclining) by 0 to less than 1 degree from a (000-1) face of the silicon carbide semiconductor substrate, wherein at least one of a P type semiconductor area or an N type semiconductor area is selectively formed in the epitaxial layer by ion implantation, a metal electrode is formed so as to contact a surface layer of the P type semiconductor area or the N type semiconductor area, a rectification function is shown between the metal electrode and the P type semiconductor area or the N type semiconductor area, and the semiconductor device is formed on the silicon carbide semiconductor substrate of a Schottky barrier diode or a PN type diode.
    Type: Grant
    Filed: August 30, 2004
    Date of Patent: September 4, 2007
    Assignee: National Institute of Advanced Industrial Science and Technology
    Inventors: Kenji Fukuda, Ryouji Kosugi, Shinsuke Harada, Junji Senzaki, Kazutoshi Kojima, Satoshi Kuroda
  • Patent number: 7256082
    Abstract: A method of manufacturing a semiconductor device that provides a semiconductor device having improved channel mobility includes a process of forming a gate insulation film of silicon oxide film, silicon nitride film or silicon oxide nitride film or the like on a silicon oxide substrate, and following formation of the gate insulation film on the silicon oxide substrate with heat treatment for a given time at a temperature range of 900° C. to 1000° C. in an atmosphere containing not less than 25% H2O (water).
    Type: Grant
    Filed: September 10, 2002
    Date of Patent: August 14, 2007
    Assignees: National Institute of Advanced Industrial Science and Technology, Sanyo Electric Co., Ltd.
    Inventors: Ryoji Kosugi, Kenji Fukuda, Junji Senzaki, Mitsuo Okamoto, Shinsuke Harada, Seiji Suzuki
  • Publication number: 20060151806
    Abstract: In a semiconductor device that uses a silicon carbide semiconductor substrate having p type, n type impurity semiconductor regions formed by ion implantation, the electrical characteristics of the end semiconductor device can be improved by decreasing the roughness of the silicon carbide semiconductor substrate surface. The semiconductor device of this invention is a Schottky barrier diode or a p-n type diode comprising at least one of a p type semiconductor region and n type semiconductor region selectively formed in a silicon carbide semiconductor region having an outermost surface layer surface that is a (000-1) surface or a surface inclined at an angle to the (000-1) surface, and a metal electrode formed on the outermost surface layer surface, that controls a direction in which electric current flows in a direction perpendicular to the outermost surface layer surface from application of a voltage to the metal electrode.
    Type: Application
    Filed: November 25, 2003
    Publication date: July 13, 2006
    Applicant: NATIONAL INSTITUTE OF ADV. INDUSTRIAL SCI. & TECH
    Inventors: Kenji Fukuda, Ryoji Kosugi, Junji Senzaki, Shinsuke Harada
  • Publication number: 20050245034
    Abstract: A semiconductor device and a method of manufacturing the device using a (000-1)-faced silicon carbide substrate are provided. A SiC semiconductor device having a high voltage resistancehigh blocking voltage and high channel mobility is manufactured by opting the heat treatment method used following the gate oxidation. The method of manufacturing a semiconductor device includes the steps of forming a gate insulation layer on a semiconductor region formed of silicon carbide having a (000-1) face orientation, forming a gate electrode on the gate insulation layer, forming an electrode on the semiconductor region, cleaning the semiconductor region surface. The gate insulation layer is formed in an atmosphere containing 1% or more H2O (water) vapor at a temperature of from 800° C. to 1150° C. to reduce the interface trap density of the interface between the gate insulation layer and the semiconductor region.
    Type: Application
    Filed: June 26, 2003
    Publication date: November 3, 2005
    Applicant: NATIONAL Institute of Advanced Indust Sci& Tech
    Inventors: Kenji Fukuda, Junji Senzaki
  • Publication number: 20050183820
    Abstract: Thermal treatment equipment for rapidly heating a SiC substrate having a diameter of several inches or larger to a temperature as high as 1200° C. or higher with a high in-plane evenness by heating a peripheral zone of a substrate using high frequency induction and by heating a central zone of the substrate using infrared lamps while the substrate and a stage thereof are covered with a shield plate.
    Type: Application
    Filed: June 24, 2004
    Publication date: August 25, 2005
    Inventors: Kenji Fukuda, Junji Senzaki, Shinichi Nishizawa, Tomoyoshi Endo, Teruyuki Yashima
  • Publication number: 20050077591
    Abstract: A semiconductor device formed on a silicon carbide semiconductor substrate comprises an epitaxial layer formed on a surface sloping (or inclining) by 0 to less than 1 degree from a (000-1) face of the silicon carbide semiconductor substrate, wherein at least one of a P type semiconductor area or an N type semiconductor area is selectively formed in the epitaxial layer by ion implantation, a metal electrode is formed so as to contact a surface layer of the P type semiconductor area or the N type semiconductor area, a rectification function is shown between the metal electrode and the P type semiconductor area or the N type semiconductor area, and the semiconductor device is formed on the silicon carbide semiconductor substrate of a Schottky barrier diode or a PN type diode.
    Type: Application
    Filed: August 30, 2004
    Publication date: April 14, 2005
    Inventors: Kenji Fukuda, Ryouji Kosugi, Shinsuke Harada, Junji Senzaki, Kazutoshi Kojima, Satoshi Kuroda
  • Publication number: 20040242022
    Abstract: A method of manufacturing a semiconductor device that provides a semiconductor device having improved channel mobility includes a process of forming a gate insulation film of silicon oxide film, silicon nitride film or silicon oxide nitride film or the like on a silicon oxide substrate, and following formation of the gate insulation film on the silicon oxide substrate with heat treatment for a given time at a temperature range of 900° C. to 1000° C. in an atmosphere containing not less than 25% H2O (water).
    Type: Application
    Filed: July 21, 2004
    Publication date: December 2, 2004
    Inventors: Ryoji Kosugi, Kenji Fukuda, Junji Senzaki, Mitsuo Okamoto, Shinsuke Harada, Seiji Suzuki
  • Patent number: 6812102
    Abstract: In a semiconductor device using a silicon carbide substrate (1), the object of the present invention is to provide a method of manufacturing a semiconductor device that is a buried channel region type transistor having hot-carrier resistance, high punch-through resistance and high channel mobility. This is achieved by using a method of manufacturing a buried channel type transistor using a P-type silicon carbide substrate that includes a step of forming a buried channel region, a source region and a drain region, a step of forming a gate insulation layer after the step of forming the buried channel region, source region and drain region, and a step of exposing the gate insulation layer to an atmosphere containing water vapor at a temperature of 500° C. or more after the step of forming the gate insulation layer. The gate insulation layer is formed by a thermal oxidation method using dry oxygen.
    Type: Grant
    Filed: December 30, 2003
    Date of Patent: November 2, 2004
    Assignees: National Institute of Advanced Industrial Science and Technology, Japan Science and Technology Corporation, Sanyo Electric Co., Ltd.
    Inventors: Kenji Fukuda, Kazuo Arai, Junji Senzaki, Shinsuke Harada, Ryoji Kosugi, Kazuhiro Adachi, Seiji Suzuki
  • Patent number: 6764963
    Abstract: A semiconductor device is manufactured using a SiC substrate. On a semiconductor region a region formed of SiC having an (11-20) face orientation is formed. A gate insulation layer is a gate oxidation layer. The surface of the semiconductor region is cleaned, and the gate insulation layer is formed in an atmosphere containing hydrogen or water vapor. After the gate insulation layer has been formed, the substrate is heat-treated in an atmosphere containing hydrogen or water vapor. This reduces the interface-trap density at the interface between the gate oxidation layer and the semiconductor region.
    Type: Grant
    Filed: March 20, 2002
    Date of Patent: July 20, 2004
    Assignees: National Institute of Advanced Industrial Science and Technology, Sanyo Electric Co., Ltd.
    Inventors: Kenji Fukuda, Junji Senzaki, Ryoji Kosugi, Kazuo Arai, Seiji Suzuki
  • Patent number: 6759684
    Abstract: An MIS transistor that uses a silicon carbide substrate has a buried channel structure. The surface orientation of the silicon carbide substrate is optimized so that the device does not assume a normally on state, has good hot-carrier endurance and punch-through endurance, and high channel mobility. In particular, a P-type silicon carbide semiconductor substrate is used to form a buried channel region. To achieve high mobility, the depth at which the buried channel region is formed is optimized, and the ratio between buried channel region junction depth (Lbc) source and drain region junction depth (Xj) is made to be within 0.2 to 1.0. The device can be formed on any surface of a hexagonal or rhombohedral or a (110) surface of a cubic system silicon carbide crystal, and provides a particularly good effect when formed on the (11-20) surface.
    Type: Grant
    Filed: November 14, 2001
    Date of Patent: July 6, 2004
    Assignees: National Institute of Advanced Industrial Science and Technology, Japan Science and Technology Corporation
    Inventors: Kenji Fukuda, Kazuo Arai, Junji Senzaki, Shinsuke Harada, Ryoji Kosugi, Kazuhiro Adachi
  • Publication number: 20040087093
    Abstract: In a semiconductor device using a silicon carbide substrate (1), the object of the present invention is to provide a method of manufacturing a semiconductor device that is a buried channel region type transistor having hot-carrier resistance, high punch-through resistance and high channel mobility. This is achieved by using a method of manufacturing a buried channel type transistor using a P-type silicon carbide substrate that includes a step of forming a buried channel region, a source region and a drain region, a step of forming a gate insulation layer after the step of forming the buried channel region, source region and drain region, and a step of exposing the gate insulation layer to an atmosphere containing water vapor at a temperature of 500° C. or more after the step of forming the gate insulation layer. The gate insulation layer is formed by a thermal oxidation method using dry oxygen.
    Type: Application
    Filed: December 30, 2003
    Publication date: May 6, 2004
    Inventors: Kenji Fukuda, Kazuo Arai, Junji Senzaki, Shinsuke Harada, Ryoji Kosugi, Kazuhiro Adachi, Seiji Suzuki
  • Publication number: 20030013266
    Abstract: A semiconductor device is manufactured using a SiC substrate. On a semiconductor region a region formed of SiC having an (11-20) face orientation is formed. A gate insulation layer is a gate oxidation layer. The surface of the semiconductor region is cleaned, and the gate insulation layer is formed in an atmosphere containing hydrogen or water vapor After the gate insulation layer has been formed, the substrate is heat-treated in an atmosphere containing hydrogen or water vapor. This reduces the interface-trap and the semiconductor region.
    Type: Application
    Filed: March 20, 2002
    Publication date: January 16, 2003
    Applicant: National Inst. of Advanced Ind. Science and Tech.
    Inventors: Kenji Fukuda, Junji Senzaki, Ryoji Kosugi, Kazuo Arai, Seiji Suzuki
  • Publication number: 20020047125
    Abstract: An MIS transistor that uses a silicon carbide substrate has a buried channel structure. The surface orientation of the silicon carbide substrate is optimized so that the device does not assume a normally on state, has good hot-carrier endurance and punch-through endurance, and high channel mobility. In particular, a P-type silicon carbide semiconductor substrate is used to form a buried channel region. To achieve high mobility, the depth at which the buried channel region is formed is optimized, and the ratio between buried channel region junction depth (Lbc) source and drain region junction depth (Xj) is made to be within 0.2 to 1.0. The device can be formed on any surface of a hexagonal or rhombohedral or a (110) surface of a cubic system silicon carbide crystal, and provides a particularly good effect when formed on the (11-20) surface.
    Type: Application
    Filed: November 14, 2001
    Publication date: April 25, 2002
    Applicant: Nat ' l Inst. of Advanced industrial and Technology
    Inventors: Kenji Fukuda, Kazuo Arai, Junji Senzaki, Shinsuke Harada, Ryoji Kosugi, Kazuhiro Adachi