Patents by Inventor Junji Takiguchi

Junji Takiguchi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8558826
    Abstract: A driving circuit for a display device for selectively outputting a driving voltage positive or negative with respect to a given reference voltage of the display device in accordance with an image signal, includes an input stage circuit; and an output stage circuit for outputting a driving voltage between a given high voltage and a first intermediate voltage or a driving voltage between a second intermediate voltage and a given low voltage in accordance with a pair of output stage control signals output from the input stage circuit.
    Type: Grant
    Filed: June 6, 2008
    Date of Patent: October 15, 2013
    Assignee: Panasonic Corporation
    Inventors: Kazuhito Ito, Junji Takiguchi, Tooru Suyama
  • Patent number: 8514164
    Abstract: In an output mode, an output switch (SW11) is turned on and supply switches (SW13a, SW13b) are turned off, and output current is supplied to an intermediate node (nc) from driving transistors (T105a, T105b). In a transition mode, the output switch (SW11) is turned off and the supply switches (SW13a, SW13b) are turned on, and supply of the output current from the driving transistors (T105a, T105b) is shut off. Meanwhile, capacitance elements (C103a, C103b) receive voltage from reference nodes (Vcc, Vss). Also input voltage (Vin) is supplied to the intermediate node (nc).
    Type: Grant
    Filed: March 11, 2011
    Date of Patent: August 20, 2013
    Assignee: Panasonic Corporation
    Inventors: Kazuyoshi Nishi, Junji Takiguchi, Tetsuo Asada, Osamu Sarai
  • Publication number: 20110157146
    Abstract: In an output mode, an output switch (SW11) is turned on and supply switches (SW13a, SW13b) are turned off, and output current is supplied to an intermediate node (nc) from driving transistors (T105a, T105b). In a transition mode, the output switch (SW11) is turned off and the supply switches (SW13a, SW13b) are turned on, and supply of the output current from the driving transistors (T105a, T105b) is shut off. Meanwhile, capacitance elements (C103a, C103b) receive voltage from reference nodes (Vcc, Vss). Also input voltage (Vin) is supplied to the intermediate node (nc).
    Type: Application
    Filed: March 11, 2011
    Publication date: June 30, 2011
    Applicant: PANASONIC CORPORATION
    Inventors: Kazuyoshi NISHI, Junji Takiguchi, Tetsuo Asada, Osamu Sarai
  • Patent number: 7928953
    Abstract: In an output mode, an output switch (SW11) is turned on and supply switches (SW13a, SW13b) are turned off, and output current is supplied to an intermediate node (nc) from driving transistors (T105a, T105b). In a transition mode, the output switch (SW11) is turned off and the supply switches (SW13a, SW13b) are turned on, and supply of the output current from the driving transistors (T105a, T105b) is shut off. Meanwhile, capacitance elements (C103a, C103b) receive voltage from reference nodes (Vcc, Vss). Also input voltage (Vin) is supplied to the intermediate node (nc).
    Type: Grant
    Filed: March 20, 2006
    Date of Patent: April 19, 2011
    Assignee: Panasonic Corporation
    Inventors: Kazuyoshi Nishi, Junji Takiguchi, Tetsuo Asada, Osamu Sarai
  • Publication number: 20080316196
    Abstract: A driving circuit for a display device for selectively outputting a driving voltage positive or negative with respect to a given reference voltage of the display device in accordance with an image signal, includes an input stage circuit; and an output stage circuit for outputting a driving voltage between a given high voltage and a first intermediate voltage or a driving voltage between a second intermediate voltage and a given low voltage in accordance with a pair of output stage control signals output from the input stage circuit.
    Type: Application
    Filed: June 6, 2008
    Publication date: December 25, 2008
    Inventors: Kazuhito Ito, Junji Takiguchi, Tooru Suyama
  • Publication number: 20080150858
    Abstract: In an output mode, an output switch (SW11) is turned on and supply switches (SW13a, SW13b) are turned off, and output current is supplied to an intermediate node (nc) from driving transistors (T105a, T105b). In a transition mode, the output switch (SW11) is turned off and the supply switches (SW13a, SW13b) are turned on, and supply of the output current from the driving transistors (T105a, T105b) is shut off. Meanwhile, capacitance elements (C103a, C103b) receive voltage from reference nodes (Vcc, Vss). Also input voltage (Vin) is supplied to the intermediate node (nc).
    Type: Application
    Filed: March 20, 2006
    Publication date: June 26, 2008
    Inventors: Kazuyoshi Nishi, Junji Takiguchi, Tetsuo Asada, Osamu Sarai
  • Patent number: 7271670
    Abstract: A CR oscillation circuit comprises first and second logic elements, a capacitive element, and a resistive element. The first logic element is connected between a first node and a second node. The second logic element is connected between the second node and a third node. The capacitive element is connected between the first node and the second node. The resistive element is connected between the first node and the third node. The capacitive element includes a well, a diffusion layer, a gate electrode and a gate oxide film. The capacitive element has a voltage-dependence characteristic such that its capacitance value varies according to the variation in a supply voltage. The capacitance value of the capacitive element decreases when the on-resistance of the first and second logic elements increases according to the variation in the supply voltage.
    Type: Grant
    Filed: November 10, 2005
    Date of Patent: September 18, 2007
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Kazuyoshi Nishi, Junji Takiguchi
  • Publication number: 20060109060
    Abstract: A CR oscillation circuit comprises first and second logic elements, a capacitive element, and a resistive element. The first logic element is connected between a first node and a second node. The second logic element is connected between the second node and a third node. The capacitive element is connected between the first node and the second node. The resistive element is connected between the first node and the third node. The capacitive element includes a well, a diffusion layer, a gate electrode and a gate oxide film. The capacitive element has a voltage-dependence characteristic such that its capacitance value varies according to the variation in a supply voltage. The capacitance value of the capacitive element decreases when the on-resistance of the first and second logic elements increases according to the variation in the supply voltage.
    Type: Application
    Filed: November 10, 2005
    Publication date: May 25, 2006
    Inventors: Kazuyoshi Nishi, Junji Takiguchi
  • Patent number: 6940673
    Abstract: A magnetic reproducing device which includes a signal detecting means for detecting a signal from a magnetic recording medium by a coil, an amplifying means for amplifying the signal detected by the signal detecting means, a filtering means for filtering the signal amplified by the amplifying means, and a capacitor connected in parallel to the coil of the signal detecting means. In this device, the actual resonance frequency of a resonance circuit including the coil, the capacitor and a floating capacitance is set to be four to eight times the maximum reproduced frequency, thereby attenuating the high-frequency high-energy electromagnetic noise inputted to the magnetic reproducing device.
    Type: Grant
    Filed: February 25, 2002
    Date of Patent: September 6, 2005
    Assignee: Sony Corporation
    Inventors: Satoshi Goto, Junji Takiguchi, Kiyoshi Tada
  • Publication number: 20020118478
    Abstract: A magnetic reproducing device which includes a signal detecting means for detecting a signal from a magnetic recording medium by a coil, an amplifying means for amplifying the signal detected by the signal detecting means, a filtering means for filtering the signal amplified by the amplifying means, and a capacitor connected in parallel to the coil of the signal detecting means. In this device, the actual resonance frequency of a resonance circuit including the coil, the capacitor and a floating capacitance is set to be four to eight times the maximum reproduced frequency, thereby attenuating the high-frequency high-energy electromagnetic noise inputted to the magnetic reproducing device.
    Type: Application
    Filed: February 25, 2002
    Publication date: August 29, 2002
    Inventors: Satoshi Goto, Junji Takiguchi, Kiyoshi Tada