Abstract: A material control system which provides for centralized control of a stock and an order so as to keep an appropriate control of materials in stock without differentiating a material which requires a regenerating process and a material which does not require a regenerating process. The material control system includes a master table storing information for controlling each of materials. The information is provided in an entry field of a regeneration control flag (104) indicating whether or not each of materials to be used in a manufacturing apparatus is regeneratable and an entry field of a regeneration order control flag (201) indicating whether or not a registered contractor is a seller or a regeneration contractor. The material control system further includes an order control section for making a purchase order for the materials and an order for a regenerating process, using the regeneration order control flag (201), and a stock control section for controlling a stock of the materials.

Abstract: Provided are a material management apparatus and a material management method which are capable of efficiently managing an adequate amount of stock and order of materials used in a semiconductor manufacturing line. Specifically, an operation part (11) receives data (D3) from a data processing part (10), and receives data (D6) from an operation part (12). The data (D3) is data containing information of a material ID and information of the number of wafers to be processed in a first unit period of time. The data (D6) is data of an endurance limit number of material which is found by the operation part (12). The operation part (11) performs an operation of dividing the number of wafers to be processed by the endurance limit number, to find the number of material needed in processing all the wafers to be processed in the first unit period of time (i.e., an estimated number in use), and then outputs the result as data (D7). The data (D7) is inputted to an order management part (4).

Abstract: A system and method for controlling the flow of manufacturing semiconductor devices that can prevent the occurrence of defects in semiconductor devices or the damage of manufacturing equipment due to the lack of the knowledge or the carelessness of the producer of the flow of manufacturing semiconductor devices.

Abstract: In a miniaturized complete CMOS SRAM of a TFT load type, a field effect thin-film transistor (TFT) can achieve stable reading and writing operation of a memory cell and can reduce power consumption thereof. The field effect thin-film transistor formed on an insulator includes an active layer and a gate electrode. The gate electrode is formed on a channel region of the active layer with a gate insulating film therebetween. The active layer is formed of a channel region and source/drain regions. The channel region is formed of a monocrystal silicon layer and does not includes a grain boundary. The source/drain regions is formed of a polysilicon layer. The channel region has a density of crystal defects of less than 10.sup.9 pieces/cm.sup.2. The thin film transistor shows an ON current of 0.25 .mu.A/.mu.m per channel width of 1 .mu.m and an OFF current of 15 fA/.mu.m. The thin-film transistor can be applied to a p-channel MOS transistor serving as a load transistor in a memory cell of a CMOS type SRAM.

Abstract: In a miniaturized complete CMOS SRAM of a TFT load type, a field effect thin-film transistor (TFT) can achieve stable reading and writing operation of a memory cell and can reduce power consumption thereof. The field effect thin-film transistor formed on an insulator includes an active layer and a gate electrode. The gate electrode is formed on a channel region of the active layer with a gate insulating film therebetween. The active layer is formed of a channel region and source/drain regions. The channel region is formed of a monocrystal silicon layer and does not includes a grain boundary. The source/drain regions is formed of a polysilicon layer. The channel region has a density of crystal defects of less than 10.sup.9 pieces/cm.sup.2. The thin film transistor shows an ON current of 0.25 .mu.A/.mu.m per channel width of 1 .mu.m and an OFF current of 15 fA/.mu.m. The thin-film transistor can be applied to a p-channel MOS transistor serving as a load transistor in a memory cell of a CMOS type SRAM.

Abstract: A flux composition suitable for electro-slag over-lay welding a stainless steel on a circumferential inner surface of a cylindrical vessel with a strip electrode under controlling a flow of molten slag and metal with an outer electro-magnetic field, which contains 50-60% by weight of CaF.sub.2, 10-20% by weight of SiO.sub.2, 5-25% by weight of CaO and 10-30% by weight of Al.sub.2 O.sub.3 in a ratio of SiO.sub.2 /CaF.sub.2 of at least 0.20 and a ratio of CaO/SiO.sub.2 of at least 0.50.