Abstract: A digital filter performs a predetermined arithmetic operation on input digital data inputted thereto in time-series manner by the predetermined first sampling period to thereby generate output digital data corresponding to a second sampling frequency which is N (where N denotes an integral number) times larger than the predetermined first sampling frequency. This digital filter provides a synchronizing signal generating circuit and an operation control circuit. The synchronizing signal generating circuit detects the predetermined first sampling period of the input digital data to thereby generate a synchronizing signal having the second sampling frequency. The operation control circuit is activated by its internal clock which is asynchronous with the input digital data. This operation control circuit starts to perform its operation processes when the synchronizing signal is supplied thereto, thereafter it terminates the operation processes when a predetermined step number is completed.