Patents by Inventor Junji Yamasaki

Junji Yamasaki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20180296292
    Abstract: A camera drape that allows easy connection between a camera and an endoscope is provided. The camera drape for covering a camera to which an endoscope is connected includes a cylindrical camera drape film having, in the following order from one end to the other end thereof, a main body portion; and a distal end portion for holding and accommodating the camera, the distal end portion having a smaller inside diameter than the main body portion.
    Type: Application
    Filed: October 14, 2016
    Publication date: October 18, 2018
    Applicant: OKURA INDUSTRIAL CO., LTD.
    Inventors: Junji YAMASAKI, Yoshiki TAKAISHI, Masanao ORIHARA, Yasuhiro AKUNE
  • Patent number: 8354328
    Abstract: A semiconductor device includes a vertical type semiconductor element formed by using a silicon substrate, a P type impurity diffusion layer being formed at a back surface of the silicon substrate. The surface of the P type impurity diffusion layer is wet etched to expose a single silicon crystal surface of the P type impurity diffusion layer, and a metal layer having a work function of 4.5 eV or more is disposed to the single silicon crystal surface so that an ohmic contact is made between the single silicon crystal surface of the P type impurity diffusion layer and the metal layer without making a silicon-metal alloy layer between the P type impurity diffusion layer and the metal layer.
    Type: Grant
    Filed: December 6, 2010
    Date of Patent: January 15, 2013
    Assignee: Renesas Electronics Corporation
    Inventor: Junji Yamasaki
  • Publication number: 20110147814
    Abstract: A semiconductor device includes a vertical type semiconductor element formed by using a silicon substrate, a P type impurity diffusion layer being formed at a back surface of the silicon substrate. The surface of the P type impurity diffusion layer is wet etched to expose a single silicon crystal surface of the P type impurity diffusion layer, and a metal layer having a work function of 4.5 eV or more is disposed to the single silicon crystal surface so that an ohmic contact is made between the single silicon crystal surface of the P type impurity diffusion layer and the metal layer without making a silicon-metal alloy layer between the P type impurity diffusion layer and the metal layer.
    Type: Application
    Filed: December 6, 2010
    Publication date: June 23, 2011
    Inventor: Junji YAMASAKI