Patents by Inventor Junjie Wu

Junjie Wu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11962088
    Abstract: The present disclosure provides a dual-mode orbital angular momentum (OAM) convergence base cell array and metasurface preparation method. The base cell array includes 2n(2n?1) anisotropic cell structures and 2n isotropic cell structures. Each of the anisotropic cell structures includes a bottom ground layer, a dielectric substrate layer and a top pattern layer which are disposed in sequence from bottom to top, where each top pattern layer has an axisymmetric H-shaped structure. Each of the isotropic cell structures includes a bottom ground layer, a dielectric substrate layer and a top pattern layer which are disposed in sequence from bottom to top, where each top pattern layer has a square structure.
    Type: Grant
    Filed: June 14, 2022
    Date of Patent: April 16, 2024
    Assignee: Anhui University
    Inventors: Zhixiang Huang, Junjie Han, Jie Wu
  • Publication number: 20240099043
    Abstract: The present disclosure provides a quantum dot light-emitting diode (QLED) and a preparation method thereof. The QLED includes an anode and a cathode that are oppositely arranged, a quantum dot luminescent layer arranged between the anode and the cathode, and an electron transport layer (ETL) arranged between the quantum dot luminescent layer and the cathode. The ETL includes a first ETL, and the first ETL is a zinc oxide film with a surface hydroxyl content of less than or equal to 0.4. Alternatively, the ETL includes zinc oxide, and at least a part of a surface of the zinc oxide includes an amino ligand and/or a carboxyl ligand with 3 to 7 carbon atoms. In the present application, the QLED improves a service life of a QLED-based device effectively.
    Type: Application
    Filed: December 30, 2021
    Publication date: March 21, 2024
    Inventors: Longjia WU, Tianshuo ZHANG, Junjie LI, Yulin GUO, Kai TONG
  • Publication number: 20240083764
    Abstract: The present application discloses a QLED and a preparation method thereof. The QLED comprises an anode and a cathode being oppositely arranged, a quantum dot luminescent layer arranged between the anode and cathode, and an ETL arranged between the quantum dot luminescent layer and the cathode. Where the ETL includes a first ETL, and the first ETL is a zinc oxide film with a surface hydroxyl content being greater than or equal to 0.6. Or alternatively, the ETL contains zinc oxide, and the surface of at least some of the zinc oxide contains amino ligands and/or carboxyl ligands with 8-18 carbon atoms. The QLED provided in the present application improves an external quantum efficiency of the QLED device effectively.
    Type: Application
    Filed: December 30, 2021
    Publication date: March 14, 2024
    Inventors: Longjia WU, Tianshuo ZHANG, Junjie LI, Yulin GUO, Kai TONG
  • Publication number: 20240090245
    Abstract: The present disclosure relates to the field of photovoltaic technologies. Disclosed are a solar cell and a photovoltaic module. The solar cell includes: an absorption layer; and an energy selective contact layer located on a surface of the absorption layer, the energy selective contact layer having selectivity for electron energy or hole energy, and the material of the energy selective contact layer including a low-dimensional perovskite material. According to the solar cell and the photovoltaic module provided by the present disclosure, a photovoltaic module can be manufactured.
    Type: Application
    Filed: November 23, 2021
    Publication date: March 14, 2024
    Inventors: Junjie XIE, Chen XU, Zifeng LI, Zhao WU, Jinling JIN, Tong LIU
  • Publication number: 20240079470
    Abstract: Disclosed are a GaN power device and a manufacturing method thereof. The GaN power device includes a substrate, and a buffer layer, a GaN channel layer and a barrier layer sequentially stacked on the substrate from bottom to top. The barrier layer is provided with a p-GaN cap layer and a p-GaN thin layer, and the p-GaN thin layer is configured to cover the surface of the barrier layer and is connected to the p-GaN cap layer; the upper surface of the barrier layer is also provided with an input electrode and an output electrode, and a control electrode is provided on the upper surface of the p-GaN cap layer. The control electrode and the p-GaN thin layer are located between the input electrode and the output electrode.
    Type: Application
    Filed: November 9, 2023
    Publication date: March 7, 2024
    Applicant: PEKING UNIVERSITY
    Inventors: Jin WEI, Yanlin WU, Junjie YANG, Maojun WANG, Bo SHEN
  • Publication number: 20240078432
    Abstract: A self-tuning model compression methodology for reconfiguring a Deep Neural Network (DNN) includes: receiving a pre-trained DNN model and a data set; performing an inter-layer sparsity analysis to generate a first sparsity result; and performing an intra-layer sparsity analysis to generate a second sparsity result, including: defining a plurality of sparsity metrics for the network; performing forward and backward passes to collect data corresponding to the sparsity metrics; using the collected data to calculate values for the defined sparsity metrics; and visualizing the calculated values using at least a histogram.
    Type: Application
    Filed: November 14, 2023
    Publication date: March 7, 2024
    Applicant: Kneron Inc.
    Inventors: JIE WU, JUNJIE SU, BIKE XIE, Chun-Chen Liu
  • Patent number: 11916738
    Abstract: Example service processing methods and apparatus are described. One example method includes obtaining a service template set by a first controller. The service template set includes one or more service templates. The first controller sends service template information corresponding to the service template set to a second controller. The first controller receives a first message sent by the second controller. The first message includes first service template information corresponding to a first service template, and the first service template information is determined by the second controller according to a requirement of a first service. The first controller performs provisioning of the first service based on the first service template that is determined based on the first service template information. The second controller determines a corresponding service template according to a service requirement, to trigger the first controller to perform service provisioning based on the service template.
    Type: Grant
    Filed: January 19, 2023
    Date of Patent: February 27, 2024
    Assignee: Huawei Technologies Co., Ltd.
    Inventors: Juan Zheng, Xubao Zhang, Junjie Huang, Bo Wu, Ting Liao
  • Patent number: 11892742
    Abstract: The present invention discloses a method for calibrating controllable phase shifters in a multi-stage staggered Mach-Zehnder interferometer structure on an optical chip, aiming to solve the problem of calibrating the controllable phase shifters in a configurable optical network of the multi-stage staggered Mach-Zehnder interferometers. The technical solution is to calibrate the controllable phase shifters that can be calibrated in the optical network; and then to constitute calibration conditions for and calibrate inner phase shifters that has not been; and finally to constitute calibration conditions for and calibrate outer phase shifters that is not calibrated.
    Type: Grant
    Filed: September 10, 2020
    Date of Patent: February 6, 2024
    Assignee: NATIONAL UNIVERSITY OF DEFENSE TECHNOLOGY
    Inventors: Junjie Wu, Yang Wang, Xiaogang Qiang, Ping Xu, Jiangfang Ding, Mingtang Deng, Anqi Huang, Xiang Fu
  • Patent number: 11856682
    Abstract: The present invention relates to a method for measuring the ion nonextensive parameter of plasma includes the following steps: describe the plasma with nonextensive statistical mechanics, obtain the equation describing the relationship between the geodesic acoustic mode frequency and the ion acoustic speed of plasma; collect the measurement data of the geodesic acoustic mode frequencies and plasma temperature in the device where the plasma is to be measured; the obtained equation describing the relationship between the geodesic acoustic mode frequency and the ion acoustic speed of plasma is used to linearly fit the collected measured data of the geodesic acoustic mode frequency and the plasma temperature in the device where the plasma is to be measured to obtain the slope value; based on the derived equation and the obtained slope values, and combining with the safety factor of the device where the plasma is to be measured, the ion nonextensive parameter is solved numerically.
    Type: Grant
    Filed: February 8, 2023
    Date of Patent: December 26, 2023
    Assignee: NANCHANG UNIVERSITY
    Inventors: Huibin Qiu, Zuozhi Hu, Donghua Xiao, Shengfa Wu, Chengjie Zhong, Jiangcun Chen, Chaozhe Hu, Xiaobin Li, Junjie Wu, Junhui Liu, Yizhen Bao, Xiaoyang Zhang, Runrui Dai, Lihuan Liu, Jianing Xu, Xu Tu, Juecong Zhang, Peng Guo, Shuyu Long, Huang Weng, Chenyu Tong, Sanqiu Liu
  • Publication number: 20230333209
    Abstract: This application discloses a gesture recognition method and apparatus accurately recognizes a gesture of a user and improves user experience. The method includes: obtaining echo data of a radar, where the echo data includes information generated when an object moves in a detection range of the radar; filtering out, from the echo data, information that does not meet a preset condition, to obtain gesture data, where the preset condition includes at least two of a distance, a speed, or an angle, the distance includes a distance between the object and the radar, the speed includes a speed of the object relative to the radar, and the angle includes an azimuth or a pitch angle of the object in the detection range of the radar; extracting a feature from the gesture data, to obtain gesture feature information; and obtaining a target gesture based on the gesture feature information.
    Type: Application
    Filed: June 19, 2023
    Publication date: October 19, 2023
    Inventors: Xian LIU, Zhiwei YI, Junjie WU, Tao HU, Han JIANG
  • Publication number: 20230189423
    Abstract: The present invention relates to a method for measuring the ion nonextensive parameter of plasma includes the following steps: describe the plasma with nonextensive statistical mechanics, obtain the equation describing the relationship between the geodesic acoustic mode frequency and the ion acoustic speed of plasma; collect the measurement data of the geodesic acoustic mode frequencies and plasma temperature in the device where the plasma is to be measured; the obtained equation describing the relationship between the geodesic acoustic mode frequency and the ion acoustic speed of plasma is used to linearly fit the collected measured data of the geodesic acoustic mode frequency and the plasma temperature in the device where the plasma is to be measured to obtain the slope value; based on the derived equation and the obtained slope values, and combining with the safety factor of the device where the plasma is to be measured, the ion nonextensive parameter is solved numerically.
    Type: Application
    Filed: February 8, 2023
    Publication date: June 15, 2023
    Inventors: Huibin Qiu, Zuozhi Hu, Donghua Xiao, Shengfa Wu, Chengjie Zhong, Jiangcun Chen, Chaozhe Hu, Xiaobin Li, Junjie Wu, Junhui Liu, Yizhen Bao, Xiaoyang Zhang, Runrui Dai, Lihuan Liu, Jianing Xu, Xu Tu, Juecong Zhang, Peng Guo, Shuyu Long, Huang Weng, Chenyu Tong, Sanqiu Liu
  • Publication number: 20220360260
    Abstract: Disclosed is an circuit for preventing latch-up, comprising a first transistor, a second transistor of a type opposite to that of the first transistor, and a control circuit, wherein a control terminal of the first transistor receives a first control voltage and a first terminal of the first transistor receives a first supply voltage; a control terminal of the second transistor receives a second control voltage, and is connected to a second terminal of the first transistor; a first terminal of the second transistor is connected to the control terminal of the first transistor, and a second terminal of the second transistor receives a second supply voltage. The control circuit is coupled on a path formed by the first transistor and the second transistor between the first supply voltage and the second supply voltage for disconnecting the path when the first control voltage and/or the second control voltage is out of a predetermined range.
    Type: Application
    Filed: March 28, 2022
    Publication date: November 10, 2022
    Applicant: Chipone Technology (Beijing) Co., Ltd.
    Inventors: Tianhao Chen, Junjie WU
  • Patent number: 11417718
    Abstract: The disclosure provides a display panel, a manufacturing method thereof, and a display device. A display area is defined on a surface of the display panel, and a first electricity supply area and a second electricity supply area are disposed opposite to each other at two sides of the display area. The display panel includes a substrate layer, and a first metal layer and a second metal layer which are sequentially disposed on the substrate layer, and an insulating layer is further disposed between the first metal layer and the second metal layer in the display area.
    Type: Grant
    Filed: March 6, 2020
    Date of Patent: August 16, 2022
    Assignee: WUHAN CHINA STAR OPTOELECTRONICS SEMICONDUCTOR DISPLAY TECHNOLOGY CO., LTD.
    Inventor: Junjie Wu
  • Patent number: 11411207
    Abstract: A display panel and a method of manufacturing the display panel are provided. The display panel includes an array substrate, a pixel definition layer, and spacers. Each of spacers includes a bottom surface and a top surface. A cross-sectional area of the top surface is less than a cross-sectional area of the bottom surface. A horizontal distance from a center to a side of the spacer gradually increases from the top surface to the bottom surface. Moreover, holes of the mask plate corresponding to positions of the spacers are defined, which ensures accuracy of photolithography and display effect of the display panel.
    Type: Grant
    Filed: February 20, 2020
    Date of Patent: August 9, 2022
    Assignee: Wuhan China Star Optoelectronics Semiconduetor Display Technology Co., Ltd.
    Inventor: Junjie Wu
  • Publication number: 20210408506
    Abstract: A display panel and a method of manufacturing the display panel are provided. The display panel includes an array substrate, a pixel definition layer, and spacers. Each of spacers includes a bottom surface and a top surface. A cross-sectional area of the top surface is less than a cross-sectional area of the bottom surface. A horizontal distance from a center to a side of the spacer gradually increases from the top surface to the bottom surface. Moreover, holes of the mask plate corresponding to positions of the spacers are defined, which ensures accuracy of photolithography and display effect of the display panel.
    Type: Application
    Filed: February 20, 2020
    Publication date: December 30, 2021
    Applicant: Wuhan China Star Optoelectronics Semiconductor Display Technology Co., LTD.
    Inventor: Junjie WU
  • Publication number: 20210408201
    Abstract: The disclosure provides a display panel, a manufacturing method thereof, and a display device. A display area is defined on a surface of the display panel, and a first electricity supply area and a second electricity supply area are disposed opposite to each other at two sides of the display area. The display panel includes a substrate layer, and a first metal layer and a second metal layer which are sequentially disposed on the substrate layer, and an insulating layer is further disposed between the first metal layer and the second metal layer in the display area.
    Type: Application
    Filed: March 6, 2020
    Publication date: December 30, 2021
    Inventor: Junjie Wu
  • Patent number: 11171196
    Abstract: The present invention provides a display panel including a base substrate, a plurality of pixel units, and a power signal structure. A display area of the display panel includes a lower display area, a middle display area, and an upper display area. The power signal structure includes a VDD power cable, a plurality of VDD signal lines, and a VDD lead-in portion. The VDD lead-in portion is electrically connected to each of the VDD signal lines through holes provided in an insulated layer in the middle display area. Therefore, the VDD power signals provided by a driving chip are introduced from the middle display area, and then transmitted from the middle display area to each of the pixel units by the VDD signal lines, which can effectively reduce the VDD voltage drop in an organic light emitting diode (OLED) panel, thereby significantly improving brightness uniformity of the OLED panel.
    Type: Grant
    Filed: February 22, 2019
    Date of Patent: November 9, 2021
    Assignee: Wuhan China Star Optoelectronics Semiconductor Display Technology Co., Ltd.
    Inventor: Junjie Wu
  • Publication number: 20210320725
    Abstract: The present invention discloses an integrated photonic chip structure for universal quantum walk simulation which combines the multiphoton source that can generate the spatially entangled multi-photon state and the linear optical network that can implement the unitary transformation, and establishes mapping between on-chip spatial-entangled multi-photon state and quantum walk state and mapping between on-chip linear optical unitary transformation and the evolution process of multi-particle quantum walk. By manipulating the spatially entangled multi-photon state generated via the multi-photon sources and the optical unitary transformation implemented via the universal linear optical networks, the chip structure can implement universal quantum walk simulation with the control over all parameters of multiple-particle quantum walks including such as evolution Hamiltonian, evolution time, initial evolution state and particle properties (i.e., particle indistinguishability and particle exchange symmetry).
    Type: Application
    Filed: April 13, 2021
    Publication date: October 14, 2021
    Applicant: NATIONAL UNIVERSITY OF DEFENSE TECHNOLOGY
    Inventors: Xiaogang QIANG, Junjie WU, Yizhi WANG
  • Patent number: 11092875
    Abstract: Reconfigurable nonlinear frequency conversion waveguide chip based on Mach-Zehnder interferometer coupled micro-ring, the method is based on the integration of waveguide components of phase-adjustable Mach-Zehnder interferometers (MZI) and micro-ring resonators. The chip is illustrated by FIG. 1. The MZI couples light and photons into and output of the micro-ring resonator and controls the micorings' quality factor thus optimize the nonlinear frequency conversion processes inside the ring by the phase-modulator inside the MZI. The micro-ring resonator enables the nonlinear optical generation of new frequency light beams and quantum light sources based on the second-order or third-order nonlinear optical process. Other optical waveguide components in region I and III of FIG. 1 are linear optical circuits for power splitting of pump beams and post-process of generated light beams or photons.
    Type: Grant
    Filed: June 14, 2020
    Date of Patent: August 17, 2021
    Assignee: National university of defense technology
    Inventors: Ping Xu, Yingwen Liu, Chao Wu, Junjie Wu
  • Patent number: D1025329
    Type: Grant
    Filed: December 25, 2022
    Date of Patent: April 30, 2024
    Inventors: Ziqing Ruan, Huanlong Wu, Linjun Yu, Weirui Liu, Junjie Ling, Pan Li