Patents by Inventor Junjie YI

Junjie YI has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12683609
    Abstract: A high-noise-resistance and low-delay level shifting circuit for a GaN half-bridge driving chip is provided, relating to the technical field of power management in integrated circuits. A path from a floating power rail VDDH to the ground is arranged to simulate the noise generated when the voltage of the floating power rail in the level shifting circuit suddenly changes. Theoretically, a noise resistance performance can be achieved according to the present disclosure. In addition, only six PMOS transistors, one NLDMOS transistor and one inverter are added, having a simple structure.
    Type: Grant
    Filed: January 22, 2025
    Date of Patent: July 14, 2026
    Assignee: CHONGQING UNIVERSITY OF POSTS AND TELECOMMUNICATIONS
    Inventors: Yi Huang, Junjie Yi, Shengqi Yu, Xingyu Luo, Sheng Gao, Hongsheng Zhang
  • Publication number: 20260194709
    Abstract: A phase control waveguide structure based on an anisotropic material and a wavelength division multiplexer structure thereof are provided. A phase control waveguide, as part of a wavelength division multiplexer, is symmetrically designed along a special angle. Based on this method, an arrayed waveguide grating for implementing a wavelength division multiplexer on the anisotropic material, and a cascaded Mach-Zehnder interferometer structure are further provided.
    Type: Application
    Filed: March 9, 2026
    Publication date: July 9, 2026
    Inventors: Liu Liu, Junjie Yi, Xiaowei Guan, Zhaoyang Chen, Guowu Zhang
  • Publication number: 20260012179
    Abstract: A high-noise-resistance and low-delay level shifting circuit for a GaN half-bridge driving chip is provided, relating to the technical field of power management in integrated circuits. A path from a floating power rail VDDH to the ground is arranged to simulate the noise generated when the voltage of the floating power rail in the level shifting circuit suddenly changes. Theoretically, a noise resistance performance can be achieved according to the present disclosure. In addition, only six PMOS transistors, one NLDMOS transistor and one inverter are added, having a simple structure.
    Type: Application
    Filed: January 22, 2025
    Publication date: January 8, 2026
    Applicant: CHONGQING UNIVERSITY OF POSTS AND TELECOMMUNICATIONS
    Inventors: Yi HUANG, Junjie YI, Shengqi YU, Xingyu LUO, Sheng GAO, Hongsheng ZHANG