Patents by Inventor Junjiro Kitano

Junjiro Kitano has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 4794441
    Abstract: A semiconductor switch circuit of field-drive type includes a bipolar component having forward blocking and reverse blocking junctions, and p-channel and n-channel IGPETS connected across the bipolar component so as to short-circuit its forward blocking junction. The switch circuit operates to turn on or off in response to the voltage signal to the gate circuit which is isolated from the bipolar component, irrespective of the polarity of a voltage applied across the bipolar component.
    Type: Grant
    Filed: June 24, 1985
    Date of Patent: December 27, 1988
    Assignees: Hitachi Ltd., Nippon Telegraph & Telephone
    Inventors: Yoshitaka Sugawara, Junjiro Kitano, Tadakatsu Kimura, Yasunobu Inabe, Masa-aki Tanabe
  • Patent number: 4465967
    Abstract: A current supply circuit comprises a DC power feed circuit exhibiting a constant current characteristic for a power source and a constant resistance characteristic for a load, a first detecting circuit for detecting a load current or a load voltage, a DC-DC converter circuit inserted between the power source and the DC power feed circuit, a second detecting circuit for detecting an output voltage from the DC-DC converter circuit; and an operation circuit coupled at the input with the output of the first detecting circuit and the output of the second detecting circuit for controlling the DC-DC converter circuit by the output thereof. The DC-DC converter circuit is so controlled as to produce a voltage representative of the sum of a voltage drop across the load and a fixed voltage necessary for the operation of the DC power feed circuit.
    Type: Grant
    Filed: January 26, 1982
    Date of Patent: August 14, 1984
    Assignees: Hitachi, Ltd., Nippon Telegraph & Telephone Public Corporation
    Inventors: Michio Tokunaga, Junjiro Kitano, Akio Sagawa, Toshio Hayashi, Kazuo Hamazato
  • Patent number: 4385336
    Abstract: This invention relates to a current supplying circuit for supplying a current to a terminal apparatus through a ring line and a tip line which are connected through resistance elements to a potential source and ground, respectively. This current supplying circuit includes respective detectors for generating first and second detection signals of amplitudes proportional to the currents flowing in the ring and tip lines, respectively, a circuit for generating a reference signal, and a comparator for comparing the signal difference between the first and second detection signals and the reference signal so as to produce a signal in accordance with the compared result, thus a shorted-to-ground fault on the ring line or tip line being detected by monitoring the signal produced in accordance with the compared result. After the shorted-to-ground fault is detected, the current supplying circuit is protected from breakdown.
    Type: Grant
    Filed: December 4, 1980
    Date of Patent: May 24, 1983
    Assignees: Hitachi, Ltd., Nippon Telegraph & Telephone Public Corporation
    Inventors: Tetsuo Takeshita, Junjiro Kitano, Koichi Hagishima
  • Patent number: 4380021
    Abstract: A semiconductor integrated circuit with a short turn-off time in which a high breakdown voltage semiconductor element and a Schottky barrier diode are fabricated into a semiconductor substrate, is disclosed. In the integrated circuit, within a semiconductor substrate of a first conductivity type, a diffusion layer with a low impurity concentration disposed deeply which is used as one layer of a high breakdown voltage semiconductor element formed by a high breakdown voltage process and a diffusion layer with a high impurity concentration disposed more shallowly than the diffusion layer with a low impurity concentration, are formed so as to partially couple with each other. The diffusion layer with the high impurity concentration is used for both the ohmic contact for the electrode of the diffusion layer with the low impurity concentration and for a guard ring for a Schottky barrier diode.
    Type: Grant
    Filed: March 21, 1980
    Date of Patent: April 12, 1983
    Assignee: Hitachi, Ltd.
    Inventors: Mitsuo Matsuyama, Ichiro Ohhinata, Junjiro Kitano
  • Patent number: 4360709
    Abstract: A circuit for detecting a closed loop formed by actuation of a telephone set, the loop being indicative of a connection between the telephone set and an exchange through a ring line and a tip line. The detecting circuit comprises generators for generating first and second detection signals having amplitudes proportional to a ring line current and a tip line current respectively, a summing circuit for summing the detection signals and a comparator for comparing the outputs of the summing circuit and a reference value and delivering an output depending upon the result of comparison.
    Type: Grant
    Filed: September 4, 1980
    Date of Patent: November 23, 1982
    Assignees: Hitachi, Ltd., Nippon Telegraph & Telephone Public Corporation
    Inventors: Kazuo Hamazato, Junjiro Kitano, Tetsuo Takeshita
  • Patent number: 4277696
    Abstract: A semiconductor switch circuit comprises first, second and third transistors. The complementary first and second transistors make up an inverted Darlington circuit. The third transistor with the base and collector thereof connected to the collector and base of the inverted Darlington circuit respectively makes up a positive feedback circuit with the inverted Darlington circuit. The conduction current of the switch circuit is split into two conduction currents flowing through the complementary first and second transistors making up the inverted Darlington circuit. By controlling the base current of at least one of the first and second transistors, the switch circuit is subjected to on-off control, thereby making it possible to reduce the required control power and increase the off-controllable load current.
    Type: Grant
    Filed: April 6, 1979
    Date of Patent: July 7, 1981
    Assignee: Hitachi, Ltd.
    Inventors: Michio Tokunaga, Junjiro Kitano