Patents by Inventor Junkei Goto

Junkei Goto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5495185
    Abstract: The current paths of the P-channel transistor, P-channel transistor, and N-channel transistor are connected in series between the power source V.sub.DD and the ground. The inverter circuit is constituted by the transistors. The node of the inverter circuit is connected to an end of the current path of the N-channel transistor. Another end of the current path of the N-channel transistor is connected to the input node. The transistors are of the enhancement type. If the electric potential higher than the power source V.sub.DD is supplied to the input node, the voltage of the node is lower than that of the power source V.sub.DD by the threshold voltage (V.sub.THN) and the transistors are protected from destruction.
    Type: Grant
    Filed: May 5, 1995
    Date of Patent: February 27, 1996
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Junkei Goto
  • Patent number: 5254994
    Abstract: A segment control type D to A converter includes a decoder and a plurality of current source cells. The decoder decodes a digital input signal to generate a control signal. The plurality of current source cells are selected by the control signal output from the decoder. A current output from the selected current source cell is output from an output terminal. Each of the current source cells includes first and second transistors. One terminal of the current path of the first transistor is connected to a constant current source, and the first transistor is ON/OFF controlled such that the gate of the transistor receives the control signal output from the decoder. One terminal of the current path of the second transistor is connected to the other terminal of the current path of the first transistor, and the other terminal of the second transistor is connected to the output terminal.
    Type: Grant
    Filed: March 4, 1992
    Date of Patent: October 19, 1993
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hiroshi Takakura, Junkei Goto
  • Patent number: 5006852
    Abstract: This invention discloses an analog-to-digital converter. Current supply paths are branched at the current supply terminals from the other current paths so as to be connected exclusively to the analog voltage comparator. And a circuit block of the analog voltage comparator is positioned closer to the current supply terminals than the other circuit block of DA converter, sequential comparison register, etc.
    Type: Grant
    Filed: May 23, 1989
    Date of Patent: April 9, 1991
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Junkei Goto, Tetsuya Iida
  • Patent number: 4958222
    Abstract: A signal interference prevention wiring is disposed between two wirings which are arranged in parallel for transmitting a signal, and the signal interference prevention wiring is held at a constant potential.
    Type: Grant
    Filed: June 9, 1989
    Date of Patent: September 18, 1990
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hiroshi Takakura, Tetsuya Iida, Junkei Goto
  • Patent number: 4908624
    Abstract: A successive approximation type A/D converter of the present invention has a capacitor having a predetermined capacitance value and arranged between an input terminal of a voltage comparator and a fixed potential terminal having a predetermined potential. According to the successive approximation type A/D converter of the present invention, the capacitor arranged between the input terminal of the voltage comparator and the fixed potential terminal having the predetermined potential prevents a potential at the input node of the voltage comparator from being greatly changed to exceed a power source voltage range due the influences of a local D/A converter when the sample mode is switched to the approximation mode. Therefore, the leakage of charges stored in the input side of the voltage comparator can be prevented. Accordingly, even if the amplitude of an analog input voltage is equal to the amplitude of the power source voltage, high-precision A/D conversion can still be performed.
    Type: Grant
    Filed: July 7, 1988
    Date of Patent: March 13, 1990
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Junkei Goto, Tetsuya Iida
  • Patent number: 4760287
    Abstract: In the comparator circuit, the amplifier circuit is comprised of an inverting amplifier section having a high gain and a noninverting amplifier section having a low output impedance. Therefore, the comparator circuit has a high input sensitivity. The comparator circuit can also operate at a high speed.
    Type: Grant
    Filed: March 18, 1987
    Date of Patent: July 26, 1988
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Junkei Goto, Masayuki Sahoda, Tetsuya Iida