Patents by Inventor Junko Hatta

Junko Hatta has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5391886
    Abstract: A method of exposing a pattern on a substrate by a charged particle beam includes the steps of energizing first and second mask deflectors provided at an upstream side of a stencil mask simultaneously to obtain a first relativistic relationship of energization between the first and second mask deflectors, energizing the first mask deflector and simultaneously the second mask deflector according to the first relativistic relationship so as to hit a selected aperture on the stencil mask, to obtain an absolute deflection of the charged particle beam as a function of the energization of the first mask deflector, energizing third and fourth mask deflectors provided at a downstream side of the stencil mask simultaneously to obtain a second relativistic relationship of energization between the third and fourth mask deflectors, and energizing the first through fourth mask deflectors according to the first and second relativistic relationship and further to the absolute relationship, such that the charged particle bea
    Type: Grant
    Filed: October 5, 1993
    Date of Patent: February 21, 1995
    Assignee: Fujitsu Limited
    Inventors: Akio Yamada, Yoshihisa Oae, Satoru Yamazaki, Tomohiko Abe, Katsuhiko Kobayashi, Kiichi Sakamoto, Junko Hatta
  • Patent number: 5255228
    Abstract: In a memory device, if there is a defective column among the memory cell columns in the memory cell array, all of the bit lines sharing the same I/O data lines as such a defective column are separated from the I/O data line regardless of the column address, and instead a group of spare bit lines disposed corresponding to each column address and selected according to the column addresses is electrically connected to the I/O data line. In this structure, the bit lines are disposed by dividing into corresponding I/O data line, and if there are defects extending in two or more columns, as long as they are within a block of the same I/O data line, all of the defective memory cells can be replaced by the memory cells in the spare column. Therefore, while minimizing the increase of chip area and lowering of operating speed in the multiple-bit organized memories, a redundancy circuit having a high defect repair efficiency may be realized.
    Type: Grant
    Filed: July 22, 1992
    Date of Patent: October 19, 1993
    Assignee: Matsushita Electronics Corporation
    Inventors: Minoru Hatta, Junko Hatta
  • Patent number: 5194741
    Abstract: A method for writing a pattern on a surface of an object by a focused electron beam with a minimized distortion of the electron beam comprises the steps of dividing the surface of the object into a plurality of parallel bands, moving the object in a direction perpendicular to the bands with a predetermined speed, achieving an exposure of the device pattern on an individual, band by band basis while moving the object with the predetermined speed. The predetermine speed is optimized with respect to an exposure interval representing a time interval in which the exposure of the band is possible.
    Type: Grant
    Filed: March 20, 1992
    Date of Patent: March 16, 1993
    Assignee: Fujitsu Limited
    Inventors: Kiichi Sakamoto, Yoshihisa Oae, Junko Hatta, Yasushi Takahashi