Patents by Inventor Junko Nakatsuru

Junko Nakatsuru has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7919397
    Abstract: The present invention provides a method for reducing the agglomeration of a Si layer in an SOI substrate, which can prevent the agglomeration of the Si layer from occurring in a heating and temperature-raising process for the Si layer, when heating and temperature-raising the Si layer that is the outermost surface of the SOI substrate and is in an exposed state, and can prevent the agglomeration further without forming a protective film on the SOI substrate. The method for reducing the agglomeration of the Si layer in the SOI substrate is a method of supplying a hydride gas in a heating and temperature-raising process for the Si layer, when heating and temperature-raising the Si layer which is in an exposed state in the SOI substrate that has an insulation layer and the Si layer sequentially stacked on a Si substrate.
    Type: Grant
    Filed: January 6, 2010
    Date of Patent: April 5, 2011
    Assignee: Canon Anelva Corporation
    Inventors: Junko Nakatsuru, Hiroki Date
  • Publication number: 20100144127
    Abstract: The present invention provides a method for reducing the agglomeration of a Si layer in an SOI substrate, which can prevent the agglomeration of the Si layer from occurring in a heating and temperature-raising process for the Si layer, when heating and temperature-raising the Si layer that is the outermost surface of the SOI substrate and is in an exposed state, and can prevent the agglomeration further without forming a protective film on the SOI substrate. The method for reducing the agglomeration of the Si layer in the SOI substrate is a method of supplying a hydride gas in a heating and temperature-raising process for the Si layer, when heating and temperature-raising the Si layer which is in an exposed state in the SOI substrate that has an insulation layer and the Si layer sequentially stacked on a Si substrate.
    Type: Application
    Filed: January 6, 2010
    Publication date: June 10, 2010
    Applicant: CANON ANELVA CORPORATION
    Inventors: Junko Nakatsuru, Hiroki Date