Abstract: A memory system connectable to a host device includes a nonvolatile memory, a first circuit configured to generate a sequence of random number bits, and a processor configured to instruct the circuit to generate a sequence of random number bits having a first length, calculate a first value indicating randomness of the sequence, determine whether the first value exceeds a threshold value, upon determining that the first value exceeds the threshold value, generate a pseudo random number using the sequence, upon determining that the first value does not exceed the threshold value, instruct the first circuit to generate another sequence of random number bits having a second length greater than the first length, and generate a pseudo random number using said another sequence, and write or read data to or from the nonvolatile memory using the generated pseudo random number.

Abstract: According to one embodiment, a storage device includes a nonvolatile memory and a controller. The controller is configured to control data write to the nonvolatile memory and data read from the nonvolatile memory based on a command from a host. The controller includes at least one processor. The nonvolatile memory stores first firmware for normal operation and second firmware for recovery. The first firmware is firmware to cause the at least one processor to control the data write and the data read based on the command. The second firmware is firmware to cause the at least one processor to recover the first firmware. The second firmware is stored in the nonvolatile memory with higher reliability than the first firmware.

Abstract: A storage device includes a storage and a controller. The controller receives commands from a host, and queues, in a command queue, the commands received from the host. The controller queues a first command, which is a command to request changing a security setting of a partial area of the storage, a second command, which is a command to access the partial area of the storage, and a third command, which is a command to access an area of the storage other than the partial area, after queuing the second command. The controller changes order of the commands queued in the command queue so that the third command is executed before the second command is executed.

Abstract: According to one embodiment, a storage device includes a nonvolatile memory and a controller. The controller is configured to control data write to the nonvolatile memory and data read from the nonvolatile memory based on a command from a host. The controller includes at least one processor. The nonvolatile memory stores first firmware for normal operation and second firmware for recovery. The first firmware is firmware to cause the at least one processor to control the data write and the data read based on the command. The second firmware is firmware to cause the at least one processor to recover the first firmware. The second firmware is stored in the nonvolatile memory with higher reliability than the first firmware.

Abstract: A storage device includes a storage and a controller. The controller receives commands from a host, and queues, in a command queue, the commands received from the host. The controller queues a first command, which is a command to request changing a security setting of a partial area of the storage, a second command, which is a command to access the partial area of the storage, and a third command, which is a command to access an area of the storage other than the partial area, after queuing the second command. The controller changes order of the commands queued in the command queue so that the third command is executed before the second command is executed.