Abstract: A digital receiver system to recover signals from inter-symbol-interference includes a finite impulse response (FIR) filter using convolution to recover signals; and a channel estimator coupled to the FIR filter to estimate FIR coefficients, wherein the channel estimator uses a second order expectation and a fourth order expectation from a convolution to calculate error function.

Abstract: A system to provide hitless protection includes a primary line card with a synchronous interface, the primary line card processing traffic with cells and encapsulating the traffic into synchronous frames in a predetermined format; and a back-up line card with a synchronous interface, the back-up line card processing the traffic with the cells and encapsulating the traffic into the synchronous frames in the predetermined format, wherein each line card includes a buffer to align the traffic before transmission, wherein the cell information sent by the primary line card is passed to the back-up line card, and wherein the back-up line card follows the received information to send to the destination cell.

Abstract: Systems and methods are disclosed for dynamic channel estimation in a digital receiver by performing a dynamic equalization on an incoming signal to compensate for channel distortion; independently estimating one or more channel parameters for the dynamic equalization, wherein the one or more channel parameters track channel change; determining a convolution of the channel parameters and updating the parameters for the dynamic equalization for subsequent processing of incoming signal; and providing an equalized output from the digital receiver.

Abstract: A parallel phase locked loop (PLL) system includes a first chain of a plurality of pre-locking PLLs that operates from a free-run state to a locked state; and a second chain of a plurality of PLLs to work from the locked-state to recover signal output.

Abstract: A source synchronous signal synchronization system includes a differential signal receiver; a tunable input delay element coupled to the receiver; an input serializer/deserializer (ISerDes) coupled to the tunable input delay; an alignment unit coupled to the ISerDes; and a delay control unit coupled to the tunable input delay, the ISerDes, and the alignment unit.

Abstract: Systems and methods are disclosed for dynamic channel estimation in a digital receiver by performing a dynamic equalization on an incoming signal to compensate for channel distortion; independently estimating one or more channel parameters for the dynamic equalization, wherein the one or more channel parameters track channel change; determining a convolution of the channel parameters and updating the parameters for the dynamic equalization for subsequent processing of incoming signal; and providing an equalized output from the digital receiver.

Abstract: A digital receiver system to recover signals from inter-symbol-interference includes a finite impulse response (FIR) filter using convolution to recover signals; and a channel estimator coupled to the FIR filter to estimate FIR coefficients, wherein the channel estimator uses a second order expectation and a fourth order expectation from a convolution to calculate error function.

Abstract: A communication system management interface includes a control master; and one or more slaves under management by the control master; wherein each device, either the control master or slave, has at least an input signal connected to an output signal of another device to form a daisy-chain.