Abstract: A neuromorphic system according to an embodiment of the invention includes an input signal section that generates an input signal, a synapse section that includes a plurality of synaptic units that receive the input signal and makes a current to flow according to a set weight, each of the plurality of synaptic units including a plurality of non-volatile memory cells capable of selectively storing a logical state, the non-volatile memory cells being arranged in a memory array that include input electrode lines and output electrode lines crossing each other, and generates an output signal for each output electrode line by the input signal, a digital calculation section that digitizes the output signal generated for each output electrode line and calculates a sum of the digitized output signals, and a controller section that controls the input signal section, the synapse section, and the digital calculation section, and the controller section designates the number of digitized digits for each output electrode li

Abstract: An object of the present invention is to provide a composition, a memory structure suitable for the composition, a manufacturing method, and an operating method for stable operation in a memory element including a chalcogen compound. In order to achieve the object, in a memory array with a cross-point structure including a first electrode line and a second electrode line intersecting each other, and a selective memory element disposed at each intersection of the first electrode line and the second electrode line and being a chalcogen compound, the present invention may provide the memory array with a cross-point structure including the first electrode line formed on a substrate, a first functional electrode formed between the first electrode line and the selective memory element, and a second functional electrode formed between the second electrode line and the selective memory element, wherein the first functional electrode is formed as a line along the first electrode line.

Abstract: The present invention provides a memory apparatus capable of causing a gradual resistance change for information processing in an analog manner to a synaptic element for implementing a neuromorphic system.

Abstract: An object of the present invention is to provide a neuromorphic system including a synaptic unit capable of causing a gradual change in resistance for analog information processing, and an operating method therefor.

Abstract: The present invention provides a method for reading a current for processing analog information in a memory array for a synaptic device. To this end, the present invention provides a method for reading a memory array including a two-terminal switching material, including (a) selecting at least one cell by applying a voltage to the memory array and (b) simultaneously measuring the sum of currents from the at least one cell selected. The voltage applied to the at least one cell selected in operation (a) is higher than a voltage applied to at least one cell not selected while being within a range in which all of the selected at least one cell is not turned on.

Abstract: An object of the present invention is to provide a composition, a memory structure suitable for the composition, a manufacturing method, and an operating method for stable operation in a memory element including a chalcogen compound. In order to achieve the object, in a memory array with a cross-point structure including a first electrode line and a second electrode line intersecting each other, and a selective memory element disposed at each intersection of the first electrode line and the second electrode line and being a chalcogen compound, the present invention may provide the memory array with a cross-point structure including the first electrode line formed on a substrate, a first functional electrode formed between the first electrode line and the selective memory element, and a second functional electrode formed between the second electrode line and the selective memory element, wherein the first functional electrode is formed as a line along the first electrode line.

Abstract: The present invention provides a memory apparatus capable of causing a gradual resistance change for information processing in an analog manner to a synaptic element for implementing a neuromorphic system.

Abstract: A power software development platform may include a platform adapter configured to provide a connection environment for a plurality of communication devices each installed in a plurality of power facilities, a platform gateway configured to collect data through a plurality of power systems to which the plurality of communication devices are connected, a platform interface which provide a distribution service for the data collected by the platform gateway, a platform data hub configured to receive the data through the distribution service, verify the received data, and provide an access environment for the verified data to an application developer, an analysis abstraction service configured to convert a plurality of physical analysis engines into abstracted services and provide the abstracted services to the application developer, and an application gateway configured to receive an application from the application developer and provide the application to an application user.

Abstract: The present invention provides a method for reading a current for processing analog information in a memory array for a synaptic device. To this end, the present invention provides a method for reading a memory array including a two-terminal switching material, including (a) selecting at least one cell by applying a voltage to the memory array and (b) simultaneously measuring the sum of currents from the at least one cell selected. The voltage applied to the at least one cell selected in operation (a) is higher than a voltage applied to at least one cell not selected while being within a range in which all of the selected at least one cell is not turned on.

Abstract: A power software development platform may include a platform adapter configured to provide a connection environment for a plurality of communication devices each installed in a plurality of power facilities, a platform gateway configured to collect data through a plurality of power systems to which the plurality of communication devices are connected, a platform interface which provide a distribution service for the data collected by the platform gateway, a platform data hub configured to receive the data through the distribution service, verify the received data, and provide an access environment for the verified data to an application developer, an analysis abstraction service configured to convert a plurality of physical analysis engines into abstracted services and provide the abstracted services to the application developer, and an application gateway configured to receive an application from the application developer and provide the application to an application user.

Abstract: A method of supporting collection of demand resources among electricity consumers in a micro grid may include: selecting a number of demand resource participating customers that are greater than or equal to a predetermined number of households and verifying electricity consumption types for the selected participating customers; calculating electricity consumption patterns and electricity consumption fluctuation rates for the customers who have passed the electricity consumption type verification; assessing potential reduction amounts for the customers who have passed the fluctuation rate calculation; checking whether the number of participating customers is greater than or equal to the predetermined number of households according to demand resource registration criteria and the sum of potential reduction amounts of participating customers satisfies a requirement for a demand reduction amount; and calculating a customer baseline load that maximizes a reduction amount of a customer using customer baseline load

Abstract: In a method of and apparatus for controlling probe tip sanding in semiconductor device testing equipment, resistance values of pads of a probed chip are measured and stored. If a maximum resistance value among the stored resistance values is greater than a contact resistance reference value, a consecutive fail counting value and an accumulated fail counting value are increased. An automatic sanding command is generated to activate automatic sanding of a probe tip, when at least one of the consecutive fail counting value and the accumulated fail counting value is greater than a respective counting reference value. In this manner, false negative readings in the testing of semiconductor devices as the result of increased contact resistance between a probe tip and a pad in an EDS test are reduced and therefore device yield is improved.

Abstract: In a method of and apparatus for controlling probe tip sanding in semiconductor device testing equipment, resistance values of pads of a probed chip are measured and stored. If a maximum resistance value among the stored resistance values is greater than a contact resistance reference value, a consecutive fail counting value and an accumulated fail counting value are increased. An automatic sanding command is generated to activate automatic sanding of a probe tip, when at least one of the consecutive fail counting value and the accumulated fail counting value is greater than a respective counting reference value. In this manner, false negative readings in the testing of semiconductor devices as the result of increased contact resistance between a probe tip and a pad in an EDS test are reduced and therefore device yield is improved.

Abstract: In a method of and apparatus for controlling probe tip sanding in semiconductor device testing equipment, resistance values of pads of a probed chip are measured and stored. If a maximum resistance value among the stored resistance values is greater than a contact resistance reference value, a consecutive fail counting value and an accumulated fail counting value are increased. An automatic sanding command is generated to activate automatic sanding of a probe tip, when at least one of the consecutive fail counting value and the accumulated fail counting value is greater than a respective counting reference value. In this manner, false negative readings in the testing of semiconductor devices as the result of increased contact resistance between a probe tip and a pad in an EDS test are reduced and therefore device yield is improved.

Abstract: The present invention relates to a method for producing high amounts of Monascus pigment by cultivating a Monascus species in a particularly prepared media to which rice powder and peptone are added as carbon and nitrogen sources, respectively.

Abstract: The present invention relates to Monascus anka 732Y3 (KCCM 10014 induced from Monascus anka ATCC 16360 (=IFO 4478, KFCC 11832), and more particularly is concerned with Monascus anka 732Y3 (KCCM 10014), which was induced from Monascus anka ATCC 16360 (=IFO 4478, KFCC 11832) by ultra-violet light irradiation and produces higher amounts of pigments than Monascus anka ATCC 16360.